//synthsis translate_off
//synopsys translate_off
"NOTE: This file should NOT be used for simulation!"
//synopsys translate_on
//synthsis translate_on

(* black_box, dont_touch="true" *)
module xsIOBI (I, O)/*synthesis syn_black_box syn_noprune=1*/;
input  I ;
output O ;
endmodule

(* black_box, dont_touch="true" *)
module xsIOBI_PD (I, O)/*synthesis syn_black_box syn_noprune=1*/;
input  I ;
output O ;
endmodule

(* black_box, dont_touch="true" *)
module xsIOBI_PU (I, O)/*synthesis syn_black_box syn_noprune=1*/;
input  I;
output O;
endmodule

(* black_box, dont_touch="true" *)
module xsIOBI_D (A, AN, Z)/*synthesis syn_black_box syn_noprune=1*/;
  input  A;
  input  AN;
  output Z;
endmodule

(* black_box, dont_touch="true" *)
module xsIOBO (I, O)/*synthesis syn_black_box syn_noprune=1*/;
input  I ;
output O ;
endmodule

(* black_box, dont_touch="true" *)
module xsIOBO_C (I, OT, OC)/*synthesis syn_black_box syn_noprune=1*/;
input  I ;
output OT ;
output OC ;
endmodule

(* black_box, dont_touch="true" *)
module xsIOBT (I, T, O)/*synthesis syn_black_box syn_noprune=1*/;
input I ;
input T ;
output O ;
endmodule

(* black_box, dont_touch="true" *)
module xsIOBT_PU (I, T, O)/*synthesis syn_black_box syn_noprune=1*/;
input I ;
input T ;
output O ;
endmodule

(* black_box, dont_touch="true" *)
module xsIOBO_D (A, Z, ZN)/*synthesis syn_black_box syn_noprune=1*/;
  input  A;
  output Z;
  output ZN;
endmodule

(* black_box, dont_touch="true" *)
module xsIOBB (I, T, O, B)/*synthesis syn_black_box syn_noprune=1*/;
input  I ;
input  T ;
output O ;
inout  B ;
endmodule

(* black_box, dont_touch="true" *)
module xsIOBB_PD (I, T, O, B)/*synthesis syn_black_box syn_noprune=1*/;
input  I ;
input  T ;
output O;
inout  B ;
endmodule

(* black_box, dont_touch="true" *)
module xsIOBB_PU (I, T, O, B)/*synthesis syn_black_box syn_noprune=1*/;
input  I ;
input  T ;
output O;
inout  B ;
endmodule

(* black_box, dont_touch="true" *)
module xsIOBB_K (I, T, O, B)/*synthesis syn_black_box syn_noprune=1*/;
input  I ;
input  T ;
output O;
inout  B ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF_K1E1G0 (D, SP, CK, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input SP ;
input CK ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF_K1E1G1 (D, SP, CK, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input SP ;
input CK ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF_K1P1E1 (D, SP, CK, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input SP ;
input CK ;
input PD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF_K1C1E1 (D, SP, CK, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input SP ;
input CK ;
input CD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF_K1R1E1 (D, SP, CK, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input SP ;
input CK ;
input CD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF_K1S1E1 (D, SP, CK, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input SP ;
input CK ;
input PD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF_K1G0 (D, CK, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D ;
input  CK ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF_K1G1 (D, CK, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D ;
input  CK ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF_K1P1 (D, CK, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D ;
input  CK ;
input  PD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF_K1C1 (D, CK, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D ;
input  CK ;
input  CD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF_K1R1 (D, CK, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D ;
input  CK ;
input  CD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF_K1S1 (D, CK, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D ;
input  CK ;
input  PD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsLAT_K1G0 (D, CK, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input CK ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsLAT_K1G1 (D, CK, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input CK ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsLAT_K1P1 (D, CK, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input CK ;
input PD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsLAT_K1C1 (D, CK, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input CK ;
input CD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsLAT_K1R1 (D, CK, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input CK ;
input CD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsLAT_K1S1 (D, CK, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input CK ;
input PD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF2_K1E1G1 (D1, D0, SP, CK, SD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D1 ;
input D0 ;
input SP ;
input CK ;
input SD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF2_K1E1G0 (D1, D0, SP, CK, SD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D1 ;
input D0 ;
input SP ;
input CK ;
input SD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF2_K1P1E1 (D1, D0, SP, CK, SD, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D1 ;
input D0 ;
input SP ;
input CK ;
input SD ;
input PD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF2_K1C1E1 (D1, D0, SP, CK, SD, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D1 ;
input D0 ;
input SP ;
input CK ;
input SD ;
input CD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF2_K1R1E1 (D1, D0, SP, CK, SD, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D1 ;
input D0 ;
input SP ;
input CK ;
input SD ;
input CD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF2_K1S1E1 (D1, D0, SP, CK, SD, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D1 ;
input D0 ;
input SP ;
input CK ;
input SD ;
input PD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF2_K1G0 (D1, D0, CK, SD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
  input  D1;
  input  D0;
  input  CK;
  input  SD;
  output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsDFF2_K1G1 (D1, D0, CK, SD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
  input  D1;
  input  D0;
  input  CK;
  input  SD;
  output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsLAT_L1G0 (D0, D1, CK, SD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
  input  D0;
  input  D1;
  input  CK;
  input  SD;
  output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsLAT_L1G1 (D0, D1, CK, SD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
  input  D0;
  input  D1;
  input  CK;
  input  SD;
  output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsLAT_L1P1 (D0, D1, CK, SD, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
  input  D0;
  input  D1;
  input  CK;
  input  SD;
  input  PD;
  output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsLAT_L1C1 (D0, D1, CK, SD, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
  input  D0;
  input  D1;
  input  CK;
  input  SD;
  input  CD;
  output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsLAT_L1R1 (D0, D1, CK, SD, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
  input  D0;
  input  D1;
  input  CK;
  input  SD;
  input  CD;
  output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsLAT_L1S1 (D0, D1, CK, SD, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
  input  D0;
  input  D1;
  input  CK;
  input  SD;
  input  PD;
  output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsIDFF_K1P1E1 (D, SP, SCLK, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D;
input SP;
input SCLK;
input PD;
output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsIDFF_K1C1E1 (D, SP, SCLK, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D;
input SP;
input SCLK;
input CD;
output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsIDFF_K1R1E1 (D, SP, SCLK, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D;
input SP;
input SCLK;
input CD;
output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsIDFF_K1S1E1 (D, SP, SCLK, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D;
input SP;
input SCLK;
input PD;
output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsODFF_K1P1E1 (D, SP, SCLK, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input SP ;
input SCLK ;
input PD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsODFF_K1C1E1 (D, SP, SCLK, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input SP ;
input SCLK ;
input CD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsODFF_K1R1E1 (D, SP, SCLK, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input SP ;
input SCLK ;
input CD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsODFF_K1S1E1 (D, SP, SCLK, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D ;
input SP ;
input SCLK ;
input PD ;
output Q ;
endmodule

(* black_box, dont_touch="true" *)
module xsILAT_K1P1 (D, SCLK, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D;
input SCLK;
input PD;
output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsILAT_K1C1 (D, SCLK, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D;
input SCLK;
input CD;
output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsILAT_K1R1 (D, SCLK, CD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D;
input SCLK;
input CD;
output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsILAT_K1S1 (D, SCLK, PD, Q)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input D;
input SCLK;
input PD;
output Q;
endmodule

(* black_box, dont_touch="true" *)
module xsINV (A, Z)/*synthesis syn_black_box syn_noprune=1*/;
input A;
output Z;
endmodule

(* black_box, dont_touch="true" *)
module xsMUX2PFU (ALUT, BLUT, C0, Z)/*synthesis syn_black_box syn_noprune=1*/;
input  ALUT ;
input  BLUT ;
input  C0 ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsL6MUX2 (D0, D1, SD, Z)/*synthesis syn_black_box syn_noprune=1*/;
input D0;
input D1;
input SD;
output Z;
endmodule

(* black_box, dont_touch="true" *)
module xsMUX2 (D1, D0, SD, Z)/*synthesis syn_black_box syn_noprune=1*/;
input D1;
input D0;
input SD;
output Z;
endmodule

(* black_box, dont_touch="true" *)
module xsMUX4 (D3, D2, D1, D0, SD2, SD1, Z)/*synthesis syn_black_box syn_noprune=1*/;
input D3 ;
input D2 ;
input D1 ;
input D0 ;
input SD2 ;
input SD1 ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsMUX8 (D7, D6, D5, D4, D3, D2, D1, D0, SD3, SD2, SD1, Z)/*synthesis syn_black_box syn_noprune=1*/;
input D7 ;
input D6 ;
input D5 ;
input D4 ;
input D3 ;
input D2 ;
input D1 ;
input D0 ;
input SD3 ;
input SD2 ;
input SD1 ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsMUX16 (D15, D14, D13, D12, D11, D10, D9, D8, D7, D6, D5, D4, D3, D2, D1, D0, SD4, SD3, SD2, SD1, Z)/*synthesis syn_black_box syn_noprune=1*/;
input D15;
input D14;
input D13;
input D12;
input D11;
input D10;
input D9;
input D8;
input D7;
input D6;
input D5;
input D4;
input D3;
input D2;
input D1;
input D0;
input SD4;
input SD3;
input SD2;
input SD1;
output Z;
endmodule

(* black_box, dont_touch="true" *)
module xsMUX32 (D31, D30, D29, D28, D27, D26, D25, D24, D23, D22, D21, D20, D19, D18, D17, D16, D15, D14, D13, D12, D11, D10, D9, D8, D7, D6, D5, D4, D3, D2, D1, D0, SD5, SD4, SD3, SD2, SD1, Z)/*synthesis syn_black_box syn_noprune=1*/;
input D31;
input D30;
input D29;
input D28;
input D27;
input D26;
input D25;
input D24;
input D23;
input D22;
input D21;
input D20;
input D19;
input D18;
input D17;
input D16;
input D15;
input D14;
input D13;
input D12;
input D11;
input D10;
input D9;
input D8;
input D7;
input D6;
input D5;
input D4;
input D3;
input D2;
input D1;
input D0;
input SD5;
input SD4;
input SD3;
input SD2;
input SD1;
output Z;
endmodule

(* black_box, dont_touch="true" *)
module xsLUT4 (A, B, C, D, Z)/*synthesis syn_black_box syn_noprune=1*/;
parameter  init = 16'h0000 ;
input  A ;
input  B ;
input  C ;
input  D ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsEQNLUT4 (A, B, C, D, Z)/*synthesis syn_black_box syn_noprune=1*/;
parameter  init         = 16'h0000 ;
parameter  lut_function = "" ;
input  A ;
input  B ;
input  C ;
input  D ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsLUT5 (Z, A, B, C, D, E)/*synthesis syn_black_box syn_noprune=1*/;
parameter  init = 32'h00000000 ;
input  A ;
input  B ;
input  C ;
input  D ;
input  E ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsEQNLUT5 (A, B, C, D, E, Z)/*synthesis syn_black_box syn_noprune=1*/;
parameter  init         = 32'h00000000 ;
parameter  lut_function = "" ;
input  A ;
input  B ;
input  C ;
input  D ;
input  E ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsLUT6 (Z, A, B, C, D, E, F)/*synthesis syn_black_box syn_noprune=1*/;
parameter  init = 64'h0000000000000000 ;
input  A ;
input  B ;
input  C ;
input  D ;
input  E ;
input  F ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsEQNLUT6 (A, B, C, D, E, F, Z)/*synthesis syn_black_box syn_noprune=1*/;
parameter  init         = 64'h0000000000000000 ;
parameter  lut_function = "" ;
input  A ;
input  B ;
input  C ;
input  D ;
input  E ;
input  F ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsPWR (PUR)/*synthesis syn_black_box syn_noprune=1*/;
  parameter RST_PULSE = 1;
  input PUR;
endmodule

(* black_box, dont_touch="true" *)
module xsROM128X1 ( AD6, AD5, AD4, AD3, AD2, AD1, AD0, DO0)/*synthesis syn_black_box syn_noprune=1*/;
parameter [127:0] initval = 128'h00000000000000000000000000000000;
input AD6 ;
input AD5 ;
input AD4 ;
input AD3 ;
input AD2 ;
input AD1 ;
input AD0 ;
output DO0 ;
endmodule

(* black_box, dont_touch="true" *)
module xsROM16X1 ( AD3, AD2, AD1, AD0, DO0)/*synthesis syn_black_box syn_noprune=1*/;
parameter [15:0] initval = 16'h0000;
input AD3 ;
input AD2 ;
input AD1 ;
input AD0 ;
output DO0 ;
endmodule

(* black_box, dont_touch="true" *)
module xsROM256X1 ( AD7, AD6, AD5, AD4, AD3, AD2, AD1, AD0, DO0)/*synthesis syn_black_box syn_noprune=1*/;
parameter [255:0] initval = 256'h0000000000000000000000000000000000000000000000000000000000000000;
input AD7 ;
input AD6 ;
input AD5 ;
input AD4 ;
input AD3 ;
input AD2 ;
input AD1 ;
input AD0 ;
output DO0 ;
endmodule

(* black_box, dont_touch="true" *)
module xsROM32X1 ( AD4, AD3, AD2, AD1, AD0, DO0)/*synthesis syn_black_box syn_noprune=1*/;
parameter [31:0] initval = 32'h00000000;
input AD4 ;
input AD3 ;
input AD2 ;
input AD1 ;
input AD0 ;
output DO0 ;
endmodule

(* black_box, dont_touch="true" *)
module xsROM64X1 ( AD5, AD4, AD3, AD2, AD1, AD0, DO0)/*synthesis syn_black_box syn_noprune=1*/;
parameter [63:0] initval = 64'h0000000000000000;
input AD5 ;
input AD4 ;
input AD3 ;
input AD2 ;
input AD1 ;
input AD0 ;
output DO0 ;
endmodule

(* black_box, dont_touch="true" *)
module xsCC (
   CIN,
   A0, B0, C0, D0,
   A1, B1, C1, D1,
   S0, S1, COUT
)/*synthesis syn_black_box syn_noprune=1*/;
input CIN;
input A0, B0, C0, D0;
input A1, B1, C1, D1;
output S0, S1, COUT;
parameter [15:0] INIT0 = 16'h0000;
parameter [15:0] INIT1 = 16'h0000;
parameter INJECT1_0 = "YES";
parameter INJECT1_1 = "YES";
endmodule

(* black_box, dont_touch="true" *)
module xsVCC ( Z )/*synthesis syn_black_box syn_noprune=1*/;
    output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsGND ( Z )/*synthesis syn_black_box syn_noprune=1*/;
    output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsCB2_E1G0 (D1, D0, CI, SP, CK, SD, CON, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD, CON;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCB2_E1G1 (D1, D0, CI, SP, CK, SD, CON, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD, CON;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCB2_P1E1 (D1, D0, CI, SP, CK, SD, PD, CON, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD, PD, CON;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCB2_C1E1 (D1, D0, CI, SP, CK, SD, CD, CON, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD, CD, CON;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCB2_R1E1 (D1, D0, CI, SP, CK, SD, CD, CON, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD, CD, CON;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCB2_S1E1 (D1, D0, CI, SP, CK, SD, PD, CON, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD, PD, CON;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCD2_E1G0 (D1, D0, CI, SP, CK, SD, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCD2_E1G1 (D1, D0, CI, SP, CK, SD, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCD2_P1E1 (D1, D0, CI, SP, CK, SD, PD, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD, PD;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCD2_C1E1 (D1, D0, CI, SP, CK, SD, CD, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD, CD;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCD2_R1E1 (D1, D0, CI, SP, CK, SD, CD, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD, CD;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCD2_S1E1 (D1, D0, CI, SP, CK, SD, PD, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD, PD;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCU2_E1G0 (D1, D0, CI, SP, CK, SD, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCU2_E1G1 (D1, D0, CI, SP, CK, SD, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCU2_P1E1 (D1, D0, CI, SP, CK, SD, PD, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD, PD;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCU2_C1E1 (D1, D0, CI, SP, CK, SD, CD, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD, CD;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCU2_R1E1 (D1, D0, CI, SP, CK, SD, CD, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD, CD;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsCU2_S1E1 (D1, D0, CI, SP, CK, SD, PD, CO, Q1, Q0)/*synthesis syn_black_box syn_noprune=1*/;
  parameter GSR = "ENABLED";
input  D1, D0, CI, SP, CK, SD, PD;
output CO, Q1, Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsDPR16X1C ( DI, WAD3, WAD2, WAD1, WAD0, WRE, WCK,
                 RAD3, RAD2, RAD1, RAD0, DO)/*synthesis syn_black_box syn_noprune=1*/;
  input DI, WAD3,WAD2,WAD1,WAD0,WCK,WRE;
  input RAD3,RAD2,RAD1,RAD0;
  output DO;
  parameter initval = "0x0000";
endmodule

(* black_box, dont_touch="true" *)
module xsRAM16X4D ( DI3, DI2, DI1, DI0, WAD3, WAD2, WAD1, WAD0, WRE, WCK,
                 RAD3, RAD2, RAD1, RAD0, DO3, DO2, DO1, DO0)/*synthesis syn_black_box syn_noprune=1*/;
  input DI3,DI2,DI1,DI0, WAD3,WAD2,WAD1,WAD0,WCK,WRE;
  input RAD3,RAD2,RAD1,RAD0;
  output DO3, DO2, DO1, DO0;
  parameter initval = "0x0000000000000000";
endmodule

(* black_box, dont_touch="true" *)
module xsRAM16X4S (DI3, DI2, DI1, DI0, AD3, AD2, AD1, AD0, WRE, CK,
                 DO3, DO2, DO1, DO0)/*synthesis syn_black_box syn_noprune=1*/;
  input DI3,DI2,DI1,DI0,AD3,AD2,AD1,AD0,CK,WRE;
  output DO3,DO2,DO1,DO0;
  parameter initval = "0x0000000000000000";
endmodule

(* black_box, dont_touch="true" *)
module xsBRAM8KTD (DIA17, DIA16, DIA15, DIA14, DIA13, DIA12, DIA11, DIA10, DIA9,
//end of change
         DIA8, DIA7, DIA6, DIA5, DIA4, DIA3, DIA2, DIA1, DIA0,
         ADA12, ADA11, ADA10, ADA9, ADA8, ADA7, ADA6, ADA5,
         ADA4,  ADA3,  ADA2, ADA1, ADA0,
         CEA, OCEA, CLKA, WEA, CSA2, CSA1, CSA0, RSTA,
//change
         DIB17, DIB16, DIB15, DIB14, DIB13, DIB12, DIB11, DIB10, DIB9,
//end of change
         DIB8, DIB7, DIB6, DIB5, DIB4, DIB3, DIB2, DIB1, DIB0,
         ADB12, ADB11, ADB10, ADB9, ADB8, ADB7, ADB6, ADB5,
         ADB4,  ADB3,  ADB2, ADB1, ADB0,
         CEB, OCEB, CLKB, WEB, CSB2, CSB1, CSB0, RSTB,
//change
         DOA17, DOA16, DOA15, DOA14, DOA13, DOA12, DOA11, DOA10, DOA9,
//end ofchange
         DOA8, DOA7, DOA6, DOA5, DOA4, DOA3, DOA2, DOA1, DOA0,
//change
         DOB17, DOB16, DOB15, DOB14, DOB13, DOB12, DOB11, DOB10, DOB9,
//end ofchange
         DOB8, DOB7, DOB6, DOB5, DOB4, DOB3, DOB2, DOB1, DOB0)/*synthesis syn_black_box syn_noprune=1*/;
   parameter  DATA_WIDTH_A = 18;            // 1, 2, 4, 9, 18, 36
   parameter  DATA_WIDTH_B = 18;            // 1, 2, 4, 9, 18, 36
   parameter  REGMODE_A = "NOREG";         // "NOREG", "OUTREG"
   parameter  REGMODE_B = "NOREG";         // "NOREG", "OUTREG"
   parameter  CSDECODE_A = "0b000";        // "0b000", "0b001", "0b010"......."0b111"
   parameter  CSDECODE_B = "0b000";        // "0b000", "0b001", "0b010"......."0b111"
   parameter  WRITEMODE_A = "NORMAL";      // "NORMAL", "READBEFOREWRITE", "WRITETHROUGH"
   parameter  WRITEMODE_B = "NORMAL";      // "NORMAL", "READBEFOREWRITE", "WRITETHROUGH"
   parameter  GSR = "ENABLED";            // "DISABLED", "ENABLED"
   parameter  RESETMODE = "SYNC";          // "SYNC", "ASYNC"
   parameter  ASYNC_RESET_RELEASE = "SYNC";          // "SYNC", "ASYNC"
   parameter  INIT_DATA = "STATIC";          // "STATIC", "DYNAMIC"
parameter INITVAL_00 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_01 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_02 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_03 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_04 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_05 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_06 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_07 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_08 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_09 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0A = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0B = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0C = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0D = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0E = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0F = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_10 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_11 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_12 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_13 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_14 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_15 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_16 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_17 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_18 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_19 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1A = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1B = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1C = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1D = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1E = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1F = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
input    DIA17, DIA16, DIA15, DIA14, DIA13, DIA12, DIA11, DIA10, DIA9,
//end of change
         DIA8, DIA7, DIA6, DIA5, DIA4, DIA3, DIA2, DIA1, DIA0,
         ADA12, ADA11, ADA10, ADA9, ADA8, ADA7, ADA6, ADA5,
         ADA4,  ADA3,  ADA2, ADA1, ADA0,
         CEA, OCEA, CLKA, WEA, CSA2, CSA1, CSA0, RSTA,
//change
         DIB17, DIB16, DIB15, DIB14, DIB13, DIB12, DIB11, DIB10, DIB9,
//end of change
         DIB8, DIB7, DIB6, DIB5, DIB4, DIB3, DIB2, DIB1, DIB0,
         ADB12, ADB11, ADB10, ADB9, ADB8, ADB7, ADB6, ADB5,
         ADB4,  ADB3,  ADB2, ADB1, ADB0,
         CEB, OCEB, CLKB, WEB, CSB2, CSB1, CSB0, RSTB;
output   DOA17, DOA16, DOA15, DOA14, DOA13, DOA12, DOA11, DOA10, DOA9,
//end of change
         DOA8, DOA7, DOA6, DOA5, DOA4, DOA3, DOA2, DOA1, DOA0,
//change
         DOB17, DOB16, DOB15, DOB14, DOB13, DOB12, DOB11, DOB10, DOB9,
//end of change
         DOB8, DOB7, DOB6, DOB5, DOB4, DOB3, DOB2, DOB1, DOB0;
endmodule

(* black_box, dont_touch="true" *)
module xsBRAM8KPD (
//change
	 DI35, DI34, DI33, DI32, DI31, DI30, DI29, DI28,
	 DI27, DI26, DI25, DI24, DI23, DI22, DI21, DI20, DI19, DI18,
//end of change
         DI17, DI16, DI15, DI14, DI13, DI12, DI11, DI10, DI9,
         DI8, DI7, DI6, DI5, DI4, DI3, DI2, DI1, DI0,
//change
         ADW7, ADW6, ADW5, ADW4, ADW3, ADW2, ADW1, ADW0,
         BE3, BE2, BE1, BE0, CEW, CLKW, CSW2, CSW1, CSW0,
//end of change
//zdx@UDT {
	ADW8, // nouse -- for backward compatible with 7K
//zdx@UDT }
         ADR12, ADR11, ADR10, ADR9, ADR8, ADR7, ADR6, ADR5,
         ADR4,  ADR3,  ADR2, ADR1, ADR0,
         CER, OCER, CLKR, CSR2, CSR1, CSR0, RST,
//change
	 DO35, DO34, DO33, DO32, DO31, DO30, DO29, DO28,
	 DO27, DO26, DO25, DO24, DO23, DO22, DO21, DO20, DO19, DO18,
//end of change
         DO17, DO16, DO15, DO14, DO13, DO12, DO11, DO10, DO9,
         DO8, DO7, DO6, DO5, DO4, DO3, DO2, DO1, DO0)/*synthesis syn_black_box syn_noprune=1*/;
   parameter  DATA_WIDTH_W = 36;
   parameter  DATA_WIDTH_R = 18;
   parameter  REGMODE = "NOREG";
   parameter  CSDECODE_W = "0b000";
   parameter  CSDECODE_R = "0b000";
   parameter  GSR = "ENABLED";
   parameter  RESETMODE = "SYNC";
   parameter  ASYNC_RESET_RELEASE = "SYNC";
   parameter  INIT_DATA = "STATIC";
parameter INITVAL_00 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_01 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_02 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_03 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_04 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_05 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_06 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_07 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_08 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_09 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0A = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0B = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0C = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0D = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0E = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0F = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_10 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_11 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_12 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_13 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_14 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_15 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_16 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_17 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_18 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_19 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1A = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1B = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1C = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1D = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1E = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1F = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
input	 DI35, DI34, DI33, DI32, DI31, DI30, DI29, DI28,
	 DI27, DI26, DI25, DI24, DI23, DI22, DI21, DI20, DI19, DI18,
//end of change
         DI17, DI16, DI15, DI14, DI13, DI12, DI11, DI10, DI9,
         DI8, DI7, DI6, DI5, DI4, DI3, DI2, DI1, DI0,
//change 082915
//         ADW8, ADW7, ADW6, ADW5, ADW4, ADW3, ADW2, ADW1, ADW0,
         ADW7, ADW6, ADW5, ADW4, ADW3, ADW2, ADW1, ADW0,
         BE3, BE2, BE1, BE0, CEW, CLKW, CSW2, CSW1, CSW0,
         ADR12, ADR11, ADR10, ADR9, ADR8, ADR7, ADR6, ADR5,
         ADR4,  ADR3,  ADR2, ADR1, ADR0,
         CER, OCER, CLKR, CSR2, CSR1, CSR0, RST;
output	 DO35, DO34, DO33, DO32, DO31, DO30, DO29, DO28,
	 DO27, DO26, DO25, DO24, DO23, DO22, DO21, DO20, DO19, DO18,
//end of change
         DO17, DO16, DO15, DO14, DO13, DO12, DO11, DO10, DO9,
         DO8, DO7, DO6, DO5, DO4, DO3, DO2, DO1, DO0;
input ADW8; // nouse -- for backward compatible with 7K
endmodule

(* black_box, dont_touch="true" *)
module xsBRAM8KS (DI17, DI16, DI15, DI14, DI13, DI12, DI11, DI10, DI9,
               DI8, DI7, DI6, DI5, DI4, DI3, DI2, DI1, DI0,
         AD12, AD11, AD10, AD9, AD8, AD7, AD6, AD5,
         AD4, AD3,  AD2, AD1, AD0,
         CE, OCE, CLK, WE, CS2, CS1, CS0, RST,
//change
	 DO17, DO16, DO15, DO14, DO13, DO12, DO11, DO10, DO9,
//end change
         DO8, DO7, DO6, DO5, DO4, DO3, DO2, DO1, DO0)/*synthesis syn_black_box syn_noprune=1*/;
   parameter  DATA_WIDTH = 18;
   parameter  REGMODE = "NOREG";
   parameter  CSDECODE = "0b000";
   parameter  WRITEMODE = "NORMAL";
   parameter  GSR = "ENABLED";
   parameter  RESETMODE = "SYNC";
   parameter  ASYNC_RESET_RELEASE = "SYNC";
   parameter  INIT_DATA = "STATIC";
parameter INITVAL_00 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_01 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_02 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_03 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_04 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_05 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_06 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_07 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_08 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_09 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0A = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0B = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0C = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0D = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0E = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_0F = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_10 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_11 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_12 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_13 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_14 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_15 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_16 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_17 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_18 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_19 = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1A = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1B = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1C = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1D = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1E = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
parameter INITVAL_1F = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
input    DI17, DI16, DI15, DI14, DI13, DI12, DI11, DI10, DI9,
//end change
         DI8, DI7, DI6, DI5, DI4, DI3, DI2, DI1, DI0,
         AD12, AD11, AD10, AD9, AD8, AD7, AD6, AD5,
         AD4, AD3,  AD2, AD1, AD0,
         CE, OCE, CLK, WE, CS2, CS1, CS0, RST;
output   DO17, DO16, DO15, DO14, DO13, DO12, DO11, DO10, DO9,
         DO8, DO7, DO6, DO5, DO4, DO3, DO2, DO1, DO0;
endmodule

(* black_box, dont_touch="true" *)
module xsFIFO8KB (DI0, DI1, DI2, DI3, DI4, DI5, DI6, DI7, DI8,
         DI9, DI10, DI11, DI12, DI13, DI14, DI15, DI16, DI17,
         FULLI, CSW0, CSW1, EMPTYI, CSR0, CSR1, WE, RE, CLKW, CLKR, RST, RPRST,
         ORE, DO0, DO1, DO2, DO3, DO4, DO5, DO6, DO7, DO8,
         DO9, DO10, DO11, DO12, DO13, DO14, DO15, DO16, DO17,
         EF, AEF, AFF, FF)/*synthesis syn_black_box syn_noprune=1*/;
   parameter  DATA_WIDTH_W = 18;
   parameter  DATA_WIDTH_R = 18;
   parameter  REGMODE = "NOREG";
   parameter  RESETMODE = "ASYNC";
   parameter  ASYNC_RESET_RELEASE = "SYNC";
   parameter  CSDECODE_W = "0b00";
   parameter  CSDECODE_R = "0b00";
   parameter  AEPOINTER = "0b00000000000000";
   parameter  AEPOINTER1 = "0b00000000000000";
   parameter  AFPOINTER = "0b00000000000000";
   parameter  AFPOINTER1 = "0b00000000000000";
   parameter  FULLPOINTER = "0b00000000000000";
   parameter  FULLPOINTER1 = "0b00000000000000";
   parameter  EMPTYPOINTER = "0b00000";
   parameter  EMPTYPOINTER1 = "0b000000";
   parameter  USE_EMPTYPOINTER = "FALSE";
   parameter  GSR = "DISABLED";
input    DI0, DI1, DI2, DI3, DI4, DI5, DI6, DI7, DI8,
         DI9, DI10, DI11, DI12, DI13, DI14, DI15, DI16, DI17,
         FULLI, CSW0, CSW1, EMPTYI, CSR0, CSR1, WE, RE, CLKW, CLKR, RST, RPRST,
         ORE;
output   DO0, DO1, DO2, DO3, DO4, DO5, DO6, DO7, DO8,
         DO9, DO10, DO11, DO12, DO13, DO14, DO15, DO16, DO17,
         EF, AEF, AFF, FF;
endmodule

(* black_box, dont_touch="true" *)
module xsIDDRX1 (
   input    D, SCLK, RST,
   output   Q0, Q1 )/*synthesis syn_black_box syn_noprune=1*/;
   parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsIDDRX2 (
   input    D, ECLK, SCLK, RST, ALIGNWD,
   output   Q0, Q1, Q2, Q3 )/*synthesis syn_black_box syn_noprune=1*/;
   parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsIDDRX4 (
   input    D, ECLK, SCLK, RST, ALIGNWD,
   output   Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7 )/*synthesis syn_black_box syn_noprune=1*/;
   parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsIDDRDQS (
   input    D, DQSR90, DDRCLKPOL, SCLK, RST,
   output   Q0, Q1 )/*synthesis syn_black_box syn_noprune=1*/;
   parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsIDDRX7 (
   input    D, ECLK, SCLK, RST, ALIGNWD,
   output   Q0, Q1, Q2, Q3, Q4, Q5, Q6 )/*synthesis syn_black_box syn_noprune=1*/;
   parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsODDR (
   input    D0, D1, SCLK, RST,
   output   Q )/*synthesis syn_black_box syn_noprune=1*/;
   parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsODDRX2 (
   input    D0, D1, D2, D3, ECLK, SCLK, RST,
   output   Q )/*synthesis syn_black_box syn_noprune=1*/;
   parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsODDRX4 (
   input    D0, D1, D2, D3, D4, D5, D6, D7, ECLK, SCLK, RST,
   output   Q )/*synthesis syn_black_box syn_noprune=1*/;
   parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsODDRDQS (
   input    DQSW90, SCLK, D0, D1, RST,
   output   Q )/*synthesis syn_black_box syn_noprune=1*/;
   parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsODDRX7 (
   input    ECLK, SCLK, D0, D1, D2, D3, D4, D5, D6, RST,
   output   Q )/*synthesis syn_black_box syn_noprune=1*/;
   parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsTDDR (
   input    DQSW90, SCLK, TD, RST,
   output   TQ )/*synthesis syn_black_box syn_noprune=1*/;
   parameter GSR = "ENABLED";
   parameter DQSW90_INVERT = "DISABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsDQS (
   input    SCLK, DQSI, READ, READCLKSEL1, READCLKSEL0, RST, DQSDEL,
   output   DDRCLKPOL, DQSR90, DQSW90, DATAVALID, BURSTDET )/*synthesis syn_black_box syn_noprune=1*/;
   parameter GSR = "ENABLED";
   parameter DQS_LI_DEL_ADJ  = "PLUS";
   parameter DQS_LI_DEL_VAL = 0;
   parameter DQS_LO_DEL_ADJ = "PLUS";
   parameter DQS_LO_DEL_VAL = 0;
   parameter LPDDR = "DISABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsDQSDLL (
   input    CLK, RST, UDDCNTLN, FREEZE,
   output   SDOUT0, SDOUT1, SDOUT2, SDOUT3, SDOUT4, SDOUT5, SDOUT6, DIVOSC,
   output   LOCK, DQSDEL )/*synthesis syn_black_box syn_noprune=1*/;
   parameter GSR = "ENABLED";
   parameter DEL_ADJ = "PLUS";
   parameter DEL_VAL = 0;
   parameter LOCK_SENSITIVITY = "LOW";
   parameter FIN = "100.0";
   parameter FORCE_MAX_DELAY = "NO";
endmodule

(* black_box, dont_touch="true" *)
module xsCLKDIV (
   input    RST, CLKI, ALIGNWD,
   output   CDIV1, CDIVX )/*synthesis syn_black_box syn_noprune=1*/;
   parameter  GSR = "DISABLED";
   parameter  DIV = "2.0";
endmodule

(* black_box, dont_touch="true" *)
module xsDCC (
   input    CLKI, CE,
   output   CLKO )/*synthesis syn_black_box syn_noprune=1*/;
endmodule

(* black_box, dont_touch="true" *)
module xsDCMUX (
   input    CLK0, CLK1, SEL,
   output   DCMOUT )/*synthesis syn_black_box syn_noprune=1*/;
endmodule

(* black_box, dont_touch="true" *)
module xsDLLDEL (
   input    CLKI, DQSDEL,
   output   CLKO )/*synthesis syn_black_box syn_noprune=1*/;
   parameter DEL_ADJ  = "PLUS";
   parameter DEL_VAL = 0;
endmodule

(* black_box, dont_touch="true" *)
module xsECLKSYNC (
   input    ECLKI, STOP,
   output   ECLKO )/*synthesis syn_black_box syn_noprune=1*/;
endmodule

(* black_box, dont_touch="true" *)
module xsECLKBBCS (
   input    CLK0, CLK1, SEL,
   output   ECSOUT )/*synthesis syn_black_box syn_noprune=1*/;
endmodule

(* black_box, dont_touch="true" *)
module xsPLL (
   input    CLKI, CLKFB, PHASESEL1, PHASESEL0, PHASEDIR, PHASESTEP,
            LOADREG, STDBY, PLLWAKESYNC, RST, RESETM, RESETC, RESETD,
            ENCLKOP, ENCLKOS, ENCLKOS2, ENCLKOS3, PLLCLK, PLLRST, PLLSTB, PLLWE,
            PLLDATI7, PLLDATI6, PLLDATI5, PLLDATI4, PLLDATI3, PLLDATI2, PLLDATI1, PLLDATI0,
            PLLADDR4, PLLADDR3, PLLADDR2, PLLADDR1, PLLADDR0,
            PLLD_SI0, PLLD_SI1, PLLD_SI2, PLLD_SI3, PLLD_SI4, PLLD_SI5, PLLD_SI6,
   output   CLKOP, CLKOS, CLKOS2, CLKOS3, LOCK, INTLOCK, REFCLK,
            PLLDATO7, PLLDATO6, PLLDATO5, PLLDATO4, PLLDATO3, PLLDATO2, PLLDATO1, PLLDATO0, PLLACK,
            DPHSRC, CLKINTFB, CLKOPD )/*synthesis syn_black_box syn_noprune=1*/;
   parameter CLKI_DIV = 1;
   parameter CLKFB_DIV = 1;
   parameter CLKOP_DIV = 8;
   parameter CLKOS_DIV = 8;
   parameter CLKOS2_DIV = 8;
   parameter CLKOS3_DIV = 8;
   parameter CLKOP_ENABLE = "ENABLED";
   parameter CLKOPD_ENABLE = "ENABLED";
   parameter CLKOPD_DLY = 0;
   parameter CLKOPD_SIGN = "FALSE";
   parameter CLKOS_ENABLE = "ENABLED";
   parameter CLKOS2_ENABLE = "ENABLED";
   parameter CLKOS3_ENABLE = "ENABLED";
   parameter VCO_BYPASS_A0 = "DISABLED";
   parameter VCO_BYPASS_B0 = "DISABLED";
   parameter VCO_BYPASS_C0 = "DISABLED";
   parameter VCO_BYPASS_D0 = "DISABLED";
   parameter CLKOP_CPHASE = 0;
   parameter CLKOS_CPHASE = 0;
   parameter CLKOS2_CPHASE = 0;
   parameter CLKOS3_CPHASE = 0;
   parameter CLKOP_FPHASE = 0;
   parameter CLKOS_FPHASE = 0;
   parameter CLKOS2_FPHASE = 0;
   parameter CLKOS3_FPHASE = 0;
   parameter FEEDBK_PATH = "CLKOP";
   parameter FRACN_ENABLE = "DISABLED";
   parameter FRACN_DIV = 0;
   parameter CLKOP_TRIM_POL = "RISING";
   parameter CLKOP_TRIM_DELAY = 0;
   parameter CLKOS_TRIM_POL = "RISING";
   parameter CLKOS_TRIM_DELAY = 0;
   parameter PLL_USE_WB = "DISABLED";
   parameter PREDIVIDER_MUXA1 = 0;
   parameter PREDIVIDER_MUXB1 = 0;
   parameter PREDIVIDER_MUXC1 = 0;
   parameter PREDIVIDER_MUXD1 = 0;
   parameter OUTDIVIDER_MUXA2 = "DIVA";
   parameter OUTDIVIDER_MUXB2 = "DIVB";
   parameter OUTDIVIDER_MUXC2 = "DIVC";
   parameter OUTDIVIDER_MUXD2 = "DIVD";
   parameter PLL_LOCK_MODE = 0;
   parameter STDBY_ENABLE = "DISABLED";
   parameter DPHASE_SOURCE = "DISABLED";
   parameter PLLRST_ENA = "DISABLED";
   parameter MRST_ENA = "DISABLED";
   parameter DCRST_ENA = "DISABLED";
   parameter DDRST_ENA = "DISABLED";
   parameter INTFB_WAKE = "DISABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsSL25PLL (
   input    CLKI, CLKFB, PHASESEL1, PHASESEL0, PHASEDIR, PHASESTEP,
            LOADREG, STDBY, PLLWAKESYNC, RST, RESETM, RESETC, RESETD,
            ENCLKOP, ENCLKOS, ENCLKOS2, ENCLKOS3, PLLCLK, PLLRST, PLLSTB, PLLWE,
            PLLDATI7, PLLDATI6, PLLDATI5, PLLDATI4, PLLDATI3, PLLDATI2, PLLDATI1, PLLDATI0,
            PLLADDR4, PLLADDR3, PLLADDR2, PLLADDR1, PLLADDR0,
            WBCLK, WBRST, WBSTB, WBWE,
            WBDATI7, WBDATI6, WBDATI5, WBDATI4, WBDATI3, WBDATI2, WBDATI1, WBDATI0,
            WBADDR4, WBADDR3, WBADDR2, WBADDR1, WBADDR0,
   output   CLKOP, CLKOS, CLKOS2, CLKOS3, LOCK, INTLOCK, REFCLK,
            PLLDATO7, PLLDATO6, PLLDATO5, PLLDATO4, PLLDATO3, PLLDATO2, PLLDATO1, PLLDATO0, PLLACK,
            WBDATO7, WBDATO6, WBDATO5, WBDATO4, WBDATO3, WBDATO2, WBDATO1, WBDATO0, WBACK,
            DPHSRC, CLKINTFB, CLKO5 )/*synthesis syn_black_box syn_noprune=1*/;
   parameter SPECTR_TEST_EN_USR = "FALSE";
   parameter CLKO5_SEL = "CLKO5"; // "CLKOPD" for legacy 12k clkopd
   parameter CLKO5_DIV = 8;
   parameter CLKO5_ENABLE = "ENABLED";
   parameter VCO_BYPASS_E0 = "DISABLED";
   parameter CLKO5_CPHASE = 0;
   parameter CLKO5_FPHASE = 0;
   //parameter PREDIVIDER_MUXE1 = 0;
   parameter OUTDIVIDER_MUXE2 = "DIVE";
   parameter CLKOPD_DLY = 0; // not supported in mib yet ... ???
   //parameter CLKOPD_SIGN = "FALSE";
   parameter CLKI_DIV = 1;
   parameter CLKFB_DIV = 1;
   parameter CLKOP_DIV = 8;
   parameter CLKOS_DIV = 8;
   parameter CLKOS2_DIV = 8;
   parameter CLKOS3_DIV = 8;
   parameter CLKOP_ENABLE = "ENABLED";
   parameter CLKOS_ENABLE = "ENABLED";
   parameter CLKOS2_ENABLE = "ENABLED";
   parameter CLKOS3_ENABLE = "ENABLED";
   parameter VCO_BYPASS_A0 = "DISABLED";
   parameter VCO_BYPASS_B0 = "DISABLED";
   parameter VCO_BYPASS_C0 = "DISABLED";
   parameter VCO_BYPASS_D0 = "DISABLED";
   parameter CLKOP_CPHASE = 0;
   parameter CLKOS_CPHASE = 0;
   parameter CLKOS2_CPHASE = 0;
   parameter CLKOS3_CPHASE = 0;
   parameter CLKOP_FPHASE = 0;
   parameter CLKOS_FPHASE = 0;
   parameter CLKOS2_FPHASE = 0;
   parameter CLKOS3_FPHASE = 0;
   parameter FEEDBK_PATH = "CLKOP";
   parameter FRACN_ENABLE = "DISABLED";
   parameter FRACN_DIV = 0;
   parameter CLKOP_TRIM_POL = "RISING";
   parameter CLKOP_TRIM_DELAY = 0;
   parameter CLKOS_TRIM_POL = "RISING";
   parameter CLKOS_TRIM_DELAY = 0;
   parameter PLL_USE_WB = "DISABLED";
   parameter PREDIVIDER_MUXA1 = 0;
   parameter PREDIVIDER_MUXB1 = 0;
   parameter PREDIVIDER_MUXC1 = 0;
   parameter PREDIVIDER_MUXD1 = 0;
   parameter OUTDIVIDER_MUXA2 = "DIVA";
   parameter OUTDIVIDER_MUXB2 = "DIVB";
   parameter OUTDIVIDER_MUXC2 = "DIVC";
   parameter OUTDIVIDER_MUXD2 = "DIVD";
   parameter PLL_LOCK_MODE = 0;
   parameter STDBY_ENABLE = "DISABLED";
   parameter DPHASE_SOURCE = "DISABLED";
   parameter PLLRST_ENA = "DISABLED";
   parameter MRST_ENA = "DISABLED";
   parameter DCRST_ENA = "DISABLED";
   parameter DDRST_ENA = "DISABLED";
   parameter INTFB_WAKE = "DISABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsPLLREFCS (
   input   CLK0, CLK1, SEL,
   output   PLLCSOUT )/*synthesis syn_black_box syn_noprune=1*/;
endmodule

(* black_box, dont_touch="true" *)
module xsOSC (
   input    STDBY,
   output   OSC, SEDSTDBY )/*synthesis syn_black_box syn_noprune=1*/;
   parameter NOM_FREQ = "2.03";
   parameter NOM_DIV = 0;
endmodule

(* black_box, dont_touch="true" *)
module xsFBCLKPLL (
   input    A,
   output   Z )/*synthesis syn_black_box syn_noprune=1*/;
endmodule

(* black_box, dont_touch="true" *)
module xsGSRS (GSR, CLK)/*synthesis syn_black_box syn_noprune=1*/;
input GSR, CLK;
endmodule

(* black_box, dont_touch="true" *)
module xsJTAG (
   input    TCK, TMS, TDI, JTDO1, JTDO2,
   output   TDO, JTCK, JTDI, JSHIFT, JUPDATE, JRSTN,
            JCE1, JCE2, JRTI1, JRTI2 )/*synthesis syn_black_box syn_noprune=1*/;
   parameter  ER1 = "ENABLED";
   parameter  ER2 = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsSTART (
   input    STARTCLK )/*synthesis syn_black_box syn_noprune=1*/;
endmodule

(* black_box, dont_touch="true" *)
module xsSEDBM (
   input AUTOREBOOT,
   output AUTODONE,
   input    SEDSTDBY, SEDENABLE, SEDSTART, SEDFRCERR,
   output   SEDERR, SEDDONE, SEDINPROG, SEDCLKOUT )/*synthesis syn_black_box syn_noprune=1*/;
   parameter SED_CLK_FREQ = "3.5";
   parameter CHECKALWAYS = "DISABLED";
   parameter DEV_DENSITY = "1200L";
   parameter AUTO_SEL = "DISABLED"; // "ENABLED"
endmodule

(* black_box, dont_touch="true" *)
module xsSEDOHM (
   output   SEDERR, SEDDONE, SEDINPROG, SEDCLKOUT )/*synthesis syn_black_box syn_noprune=1*/;
endmodule

(* black_box, dont_touch="true" *)
module xsSEDFD (
    input ECCERR_INJECT_I, ECCERR_INJECT_SHF, AUTOREBOOT,
    output ECCERR_INJECT_O,
   input    SEDENABLE, SEDSTART, SEDFRCERR, SEDEXCLK,
   output   SEDERR, SEDDONE, SEDINPROG, SEDCLKOUT , AUTODONE)/*synthesis syn_black_box syn_noprune=1*/;
   parameter SED_CLK_DIV = 0; // 0-63
   parameter CHECKALWAYS = "NONE"; // "ALWAYS", "ONCE"
   parameter AUTOFIX = "DISABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsIODLY (
   input    A,
   output   Z )/*synthesis syn_black_box syn_noprune=1*/;
   parameter DEL_MODE = "USER_DEFINED";
   parameter DEL_VALUE = "DELAY0";
endmodule

(* black_box, dont_touch="true" *)
module xsBIODLY (
   input    A, DEL4, DEL3, DEL2, DEL1, DEL0,
   output   Z )/*synthesis syn_black_box syn_noprune=1*/;
endmodule

(* black_box, dont_touch="true" *)
module xsPOWCTR (
   input    CLK, USERTIMEOUT, USERSTDBY, CLRFLAG, CFGWAKE, CFGSTDBY,
   output   STDBY, STOP, SFLAG )/*synthesis syn_black_box syn_noprune=1*/;
   parameter STDBYOPT = "USER_CFG";
   parameter TIMEOUT = "BYPASS";
   parameter WAKEUP = "USER";
   parameter POROFF = "FALSE";
   parameter BGOFF = "FALSE";
endmodule

(* black_box, dont_touch="true" *)
module xsBOOT (
   input    BOOTCLK, BOOTDIN, input [7:0] REBOOTADDR, output [7:0] LASTBOOTADDR)/*synthesis syn_black_box syn_noprune=1*/;
   parameter SOURCE_SEL = "DEFAULT"; // "FUSE" "CIB" "DEFAULT"
   parameter MSPI_ADDR = 0; // 8 bit
endmodule

(* black_box, dont_touch="true" *)
module xsDBCINRD (
   input    RD25, TERM_DISABLE, // these 2 input only for 5k/7k
   input    INRDENI )/*synthesis syn_black_box syn_noprune=1*/;
   parameter BANKID = 0;
endmodule

(* black_box, dont_touch="true" *)
module xsDBCLVDS (
   input    LVDSENI )/*synthesis syn_black_box syn_noprune=1*/;
   parameter MIPI_EN = "FALSE"; // "TRUE"
   parameter TRIM_SEL = "EFB"; // "FUSE"
   parameter TRIM = 0; // 0-15
   parameter BANKID = 0;
endmodule

(* black_box, dont_touch="true" *)
module xsBCHSLP (
    input HSLP)/*synthesis syn_black_box syn_noprune=1*/;
    parameter BANKID = 0; // bank 0 or 2
endmodule

(* black_box, dont_touch="true" *)
module xsBCTERM (
    input TERM)/*synthesis syn_black_box syn_noprune=1*/;
    parameter BANKID = 2; // bank 2 only
endmodule

(* black_box, dont_touch="true" *)
module xsIRDB (
   input    D, E,
   output   Q )/*synthesis syn_black_box syn_noprune=1*/;
endmodule

(* black_box, dont_touch="true" *)
module xsOBUFLVDS (
   input    D, E,
   output   Q )/*synthesis syn_black_box syn_noprune=1*/;
   parameter TRIM_SEL = "EFB"; // "FUSE"
   parameter TRIM = 0; // 0-7
endmodule

(* black_box, dont_touch="true" *)
module xsPOWG (
   input    D, E,
   output   Q )/*synthesis syn_black_box syn_noprune=1*/;
endmodule

(* black_box, dont_touch="true" *)
module xsDMP(
    input DMPCLK, DMPRST, DMPEN, DMPWE,
    input [7:0] DMPADR,
    input [7:0] DMPDIN,
    output [7:0] DMPDOUT,
    output DMPACK)/*synthesis syn_black_box syn_noprune=1*/;
endmodule

(* black_box, dont_touch="true" *)
module xsCEM (
   input  WBCLKI, WBRSTI, WBCYCI, WBSTBI, WBWEI,
          WBADRI7, WBADRI6, WBADRI5, WBADRI4, WBADRI3, WBADRI2, WBADRI1, WBADRI0,
          WBDATI7, WBDATI6, WBDATI5, WBDATI4, WBDATI3, WBDATI2, WBDATI1, WBDATI0,
          PLL0DATI7, PLL0DATI6, PLL0DATI5, PLL0DATI4, PLL0DATI3, PLL0DATI2, PLL0DATI1, PLL0DATI0, PLL0ACKI,
          PLL1DATI7, PLL1DATI6, PLL1DATI5, PLL1DATI4, PLL1DATI3, PLL1DATI2, PLL1DATI1, PLL1DATI0, PLL1ACKI,
          I2C1SCLI, I2C1SDAI, I2C2SCLI, I2C2SDAI,
          SPISCKI, SPIMISOI, SPIMOSII, SPISCSN,
          TCCLKI, TCRSTN, TCIC, UFMSN,
   output WBDATO7, WBDATO6, WBDATO5, WBDATO4, WBDATO3, WBDATO2, WBDATO1, WBDATO0, WBACKO,
          PLLCLKO, PLLRSTO, PLL0STBO, PLL1STBO, PLLWEO,
          PLLADRO4, PLLADRO3, PLLADRO2, PLLADRO1, PLLADRO0,
          PLLDATO7, PLLDATO6, PLLDATO5, PLLDATO4, PLLDATO3, PLLDATO2, PLLDATO1, PLLDATO0,
          I2C1SCLO, I2C1SCLOEN, I2C1SDAO, I2C1SDAOEN, I2C2SCLO, I2C2SCLOEN, I2C2SDAO, I2C2SDAOEN, I2C1IRQO, I2C2IRQO,
          SPISCKO, SPISCKEN, SPIMISOO, SPIMISOEN, SPIMOSIO, SPIMOSIEN,
          SPIMCSN0, SPIMCSN1, SPIMCSN2, SPIMCSN3, SPIMCSN4, SPIMCSN5, SPIMCSN6, SPIMCSN7, SPICSNEN, SPIIRQO,
          TCINT, TCOC, WBCUFMIRQ, CFGWAKE, CFGSTDBY )/*synthesis syn_black_box syn_noprune=1*/;
   parameter EFB_I2C1= "DISABLED";
   parameter EFB_I2C2= "DISABLED";
   parameter EFB_SPI = "DISABLED";
   parameter EFB_TC = "DISABLED";
   parameter EFB_TC_PORTMODE = "NO_WB";
   parameter EFB_UFM = "DISABLED";
   parameter EFB_WB_CLK_FREQ = "50.0";
   parameter DEV_DENSITY = "1200L";
   parameter UFM_INIT_PAGES = 0;
   parameter UFM_INIT_START_PAGE = 0;
   parameter UFM_INIT_ALL_ZEROS = "ENABLED";
   parameter UFM_INIT_FILE_NAME = "NONE";
   parameter UFM_INIT_FILE_FORMAT = "HEX";
   parameter I2C1_ADDRESSING = "7BIT";
   parameter I2C2_ADDRESSING = "7BIT";
   parameter I2C1_SLAVE_ADDR = "0b1000001";
   parameter I2C2_SLAVE_ADDR = "0b1000010";
   parameter I2C1_BUS_PERF = "100kHz";
   parameter I2C2_BUS_PERF = "100kHz";
   parameter I2C1_CLK_DIVIDER = 1;
   parameter I2C2_CLK_DIVIDER = 1;
   parameter I2C1_GEN_CALL = "DISABLED";
   parameter I2C2_GEN_CALL = "DISABLED";
   parameter I2C1_WAKEUP = "DISABLED";
   parameter I2C2_WAKEUP = "DISABLED";
   parameter SPI_MODE = "SLAVE";
   parameter SPI_CLK_DIVIDER = 1;
   parameter SPI_LSB_FIRST = "DISABLED";
   parameter SPI_CLK_INV = "DISABLED";
   parameter SPI_PHASE_ADJ = "DISABLED";
   parameter SPI_SLAVE_HANDSHAKE = "DISABLED";
   parameter SPI_INTR_TXRDY = "DISABLED";
   parameter SPI_INTR_RXRDY = "DISABLED";
   parameter SPI_INTR_TXOVR = "DISABLED";
   parameter SPI_INTR_RXOVR = "DISABLED";
   parameter SPI_WAKEUP = "DISABLED";
   parameter TC_MODE = "CTCM";
   parameter TC_SCLK_SEL = "PCLOCK";
   parameter TC_CCLK_SEL = 1;
   parameter GSR = "ENABLED";
   parameter TC_TOP_SET = 65535;
   parameter TC_OCR_SET = 32767;
   parameter TC_OC_MODE = "TOGGLE";
   parameter TC_RESETN = "ENABLED";
   parameter TC_TOP_SEL = "ON";
   parameter TC_OV_INT = "OFF";
   parameter TC_OCR_INT = "OFF";
   parameter TC_ICR_INT = "OFF";
   parameter TC_OVERFLOW = "ENABLED";
   parameter TC_ICAPTURE = "DISABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsEFB (
   input  WBCLKI, WBRSTI, WBCYCI, WBSTBI, WBWEI,
          WBADRI7, WBADRI6, WBADRI5, WBADRI4, WBADRI3, WBADRI2, WBADRI1, WBADRI0,
          WBDATI7, WBDATI6, WBDATI5, WBDATI4, WBDATI3, WBDATI2, WBDATI1, WBDATI0,
          PLL0DATI7, PLL0DATI6, PLL0DATI5, PLL0DATI4, PLL0DATI3, PLL0DATI2, PLL0DATI1, PLL0DATI0, PLL0ACKI,
          PLL1DATI7, PLL1DATI6, PLL1DATI5, PLL1DATI4, PLL1DATI3, PLL1DATI2, PLL1DATI1, PLL1DATI0, PLL1ACKI,
          I2C1SCLI, I2C1SDAI, I2C2SCLI, I2C2SDAI,
          SPISCKI, SPIMISOI, SPIMOSII, SPISCSN,
          TCCLKI, TCRSTN, TCIC, UFMSN,
   output WBDATO7, WBDATO6, WBDATO5, WBDATO4, WBDATO3, WBDATO2, WBDATO1, WBDATO0, WBACKO,
          PLLCLKO, PLLRSTO, PLL0STBO, PLL1STBO, PLLWEO,
          PLLADRO4, PLLADRO3, PLLADRO2, PLLADRO1, PLLADRO0,
          PLLDATO7, PLLDATO6, PLLDATO5, PLLDATO4, PLLDATO3, PLLDATO2, PLLDATO1, PLLDATO0,
          I2C1SCLO, I2C1SCLOEN, I2C1SDAO, I2C1SDAOEN, I2C2SCLO, I2C2SCLOEN, I2C2SDAO, I2C2SDAOEN, I2C1IRQO, I2C2IRQO,
          SPISCKO, SPISCKEN, SPIMISOO, SPIMISOEN, SPIMOSIO, SPIMOSIEN,
          SPIMCSN0, SPIMCSN1, SPIMCSN2, SPIMCSN3, SPIMCSN4, SPIMCSN5, SPIMCSN6, SPIMCSN7, SPICSNEN, SPIIRQO,
          TCINT, TCOC, WBCUFMIRQ, CFGWAKE, CFGSTDBY )/*synthesis syn_black_box syn_noprune=1*/;
   parameter EFB_I2C1= "DISABLED";
   parameter EFB_I2C2= "DISABLED";
   parameter EFB_SPI = "DISABLED";
   parameter EFB_TC = "DISABLED";
   parameter EFB_TC_PORTMODE = "NO_WB";
   parameter EFB_UFM = "DISABLED";
   parameter EFB_WB_CLK_FREQ = "50.0";
   parameter DEV_DENSITY = "1200L";
   parameter UFM_INIT_PAGES = 0;
   parameter UFM_INIT_START_PAGE = 0;
   parameter UFM_INIT_ALL_ZEROS = "ENABLED";
   parameter UFM_INIT_FILE_NAME = "NONE";
   parameter UFM_INIT_FILE_FORMAT = "HEX";
   parameter I2C1_ADDRESSING = "7BIT";
   parameter I2C2_ADDRESSING = "7BIT";
   parameter I2C1_SLAVE_ADDR = "0b1000001";
   parameter I2C2_SLAVE_ADDR = "0b1000010";
   parameter I2C1_BUS_PERF = "100kHz";
   parameter I2C2_BUS_PERF = "100kHz";
   parameter I2C1_CLK_DIVIDER = 1;
   parameter I2C2_CLK_DIVIDER = 1;
   parameter I2C1_GEN_CALL = "DISABLED";
   parameter I2C2_GEN_CALL = "DISABLED";
   parameter I2C1_WAKEUP = "DISABLED";
   parameter I2C2_WAKEUP = "DISABLED";
   parameter SPI_MODE = "SLAVE";
   parameter SPI_CLK_DIVIDER = 1;
   parameter SPI_LSB_FIRST = "DISABLED";
   parameter SPI_CLK_INV = "DISABLED";
   parameter SPI_PHASE_ADJ = "DISABLED";
   parameter SPI_SLAVE_HANDSHAKE = "DISABLED";
   parameter SPI_INTR_TXRDY = "DISABLED";
   parameter SPI_INTR_RXRDY = "DISABLED";
   parameter SPI_INTR_TXOVR = "DISABLED";
   parameter SPI_INTR_RXOVR = "DISABLED";
   parameter SPI_WAKEUP = "DISABLED";
   parameter TC_MODE = "CTCM";
   parameter TC_SCLK_SEL = "PCLOCK";
   parameter TC_CCLK_SEL = 1;
   parameter GSR = "ENABLED";
   parameter TC_TOP_SET = 65535;
   parameter TC_OCR_SET = 32767;
   parameter TC_OC_MODE = "TOGGLE";
   parameter TC_RESETN = "ENABLED";
   parameter TC_TOP_SEL = "ON";
   parameter TC_OV_INT = "OFF";
   parameter TC_OCR_INT = "OFF";
   parameter TC_ICR_INT = "OFF";
   parameter TC_OVERFLOW = "ENABLED";
   parameter TC_ICAPTURE = "DISABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsGSR (GSR)/*synthesis syn_black_box syn_noprune=1*/;
input GSR ;
endmodule

(* black_box, dont_touch="true" *)
module xsGTI (
   input TSALL )/*synthesis syn_black_box syn_noprune=1*/;
endmodule

(* black_box, dont_touch="true" *)
module xsMULT18 (P35,P34,P33,P32,P31,P30,P29,P28,P27,P26,P25,P24,P23,P22,P21,P20,P19,P18,
P17,P16,P15,P14,P13,P12,P11,P10,P9,P8,P7,P6,P5,P4,P3,P2,P1,P0,
SROA17,SROA16,SROA15,SROA14,SROA13,SROA12,SROA11,SROA10,SROA9,
SROA8,SROA7,SROA6,SROA5,SROA4,SROA3,SROA2,SROA1,SROA0,
SROB17,SROB16,SROB15,SROB14,SROB13,SROB12,SROB11,SROB10,SROB9,
SROB8,SROB7,SROB6,SROB5,SROB4,SROB3,SROB2,SROB1,SROB0,
ROA17,ROA16,ROA15,ROA14,ROA13,ROA12,ROA11,ROA10,ROA9,
ROA8,ROA7,ROA6,ROA5,ROA4,ROA3,ROA2,ROA1,ROA0,
ROB17,ROB16,ROB15,ROB14,ROB13,ROB12,ROB11,ROB10,ROB9,
ROB8,ROB7,ROB6,ROB5,ROB4,ROB3,ROB2,ROB1,ROB0,
A17,A16,A15,A14,A13,A12,A11,A10,A9,A8,A7,A6,A5,A4,A3,A2,A1,A0,
B17,B16,B15,B14,B13,B12,B11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0,
SRIA17,SRIA16,SRIA15,SRIA14,SRIA13,SRIA12,SRIA11,SRIA10,SRIA9,
SRIA8,SRIA7,SRIA6,SRIA5,SRIA4,SRIA3,SRIA2,SRIA1,SRIA0,
SRIB17,SRIB16,SRIB15,SRIB14,SRIB13,SRIB12,SRIB11,SRIB10,SRIB9,
SRIB8,SRIB7,SRIB6,SRIB5,SRIB4,SRIB3,SRIB2,SRIB1,SRIB0,
SIGNEDA,SIGNEDB,CE0,CE1,CE2,CE3,CLK0,CLK1,CLK2,CLK3,RST0,RST1,RST2,RST3,SOURCEA,SOURCEB,SIGNEDP)/*synthesis syn_black_box syn_noprune=1*/;
input A17,A16,A15,A14,A13,A12,A11,A10,A9,A8,A7,A6,A5,A4,A3,A2,A1,A0;
input B17,B16,B15,B14,B13,B12,B11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0;
input SIGNEDA,SIGNEDB,SOURCEA,SOURCEB;
input CE0,CE1,CE2,CE3,CLK0,CLK1,CLK2,CLK3,RST0,RST1,RST2,RST3;
input SRIA17,SRIA16,SRIA15,SRIA14,SRIA13,SRIA12,SRIA11,SRIA10,SRIA9;
input SRIA8,SRIA7,SRIA6,SRIA5,SRIA4,SRIA3,SRIA2,SRIA1,SRIA0;
input SRIB17,SRIB16,SRIB15,SRIB14,SRIB13,SRIB12,SRIB11,SRIB10,SRIB9;
input SRIB8,SRIB7,SRIB6,SRIB5,SRIB4,SRIB3,SRIB2,SRIB1,SRIB0;
output SROA17,SROA16,SROA15,SROA14,SROA13,SROA12,SROA11,SROA10,SROA9;
output SROA8,SROA7,SROA6,SROA5,SROA4,SROA3,SROA2,SROA1,SROA0;
output SROB17,SROB16,SROB15,SROB14,SROB13,SROB12,SROB11,SROB10,SROB9;
output SROB8,SROB7,SROB6,SROB5,SROB4,SROB3,SROB2,SROB1,SROB0;
output ROA17,ROA16,ROA15,ROA14,ROA13,ROA12,ROA11,ROA10,ROA9;
output ROA8,ROA7,ROA6,ROA5,ROA4,ROA3,ROA2,ROA1,ROA0;
output ROB17,ROB16,ROB15,ROB14,ROB13,ROB12,ROB11,ROB10,ROB9;
output ROB8,ROB7,ROB6,ROB5,ROB4,ROB3,ROB2,ROB1,ROB0;
output P35,P34,P33,P32,P31,P30,P29,P28,P27,P26,P25,P24,P23,P22,P21,P20,P19,P18;
output P17,P16,P15,P14,P13,P12,P11,P10,P9,P8,P7,P6,P5,P4,P3,P2,P1,P0;
output SIGNEDP;
parameter REG_INPUTA_CLK = "NONE";
parameter REG_INPUTA_CE = "CE0";
parameter REG_INPUTA_RST = "RST0";
parameter REG_INPUTB_CLK = "NONE";
parameter REG_INPUTB_CE = "CE0";
parameter REG_INPUTB_RST = "RST0";
parameter REG_PIPELINE_CLK = "NONE";
parameter REG_PIPELINE_CE = "CE0";
parameter REG_PIPELINE_RST = "RST0";
parameter REG_OUTPUT_CLK = "NONE";
parameter REG_OUTPUT_CE = "CE0";
parameter REG_OUTPUT_RST = "RST0";
parameter GSR = "ENABLED";
parameter CAS_MATCH_REG = "FALSE";
parameter MULT_BYPASS = "DISABLED";
parameter RESETMODE = "SYNC";
endmodule

(* black_box, dont_touch="true" *)
module xsMULT18E (P35,P34,P33,P32,P31,P30,P29,P28,P27,P26,P25,P24,P23,P22,P21,P20,P19,P18,
P17,P16,P15,P14,P13,P12,P11,P10,P9,P8,P7,P6,P5,P4,P3,P2,P1,P0,
SROA17,SROA16,SROA15,SROA14,SROA13,SROA12,SROA11,SROA10,SROA9,
SROA8,SROA7,SROA6,SROA5,SROA4,SROA3,SROA2,SROA1,SROA0,
SROB17,SROB16,SROB15,SROB14,SROB13,SROB12,SROB11,SROB10,SROB9,
SROB8,SROB7,SROB6,SROB5,SROB4,SROB3,SROB2,SROB1,SROB0,
//ROA17,ROA16,ROA15,ROA14,ROA13,ROA12,ROA11,ROA10,ROA9,
//ROA8,ROA7,ROA6,ROA5,ROA4,ROA3,ROA2,ROA1,ROA0,
//ROB17,ROB16,ROB15,ROB14,ROB13,ROB12,ROB11,ROB10,ROB9,
//ROB8,ROB7,ROB6,ROB5,ROB4,ROB3,ROB2,ROB1,ROB0,
A17,A16,A15,A14,A13,A12,A11,A10,A9,A8,A7,A6,A5,A4,A3,A2,A1,A0,
B17,B16,B15,B14,B13,B12,B11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0,
SRIA17,SRIA16,SRIA15,SRIA14,SRIA13,SRIA12,SRIA11,SRIA10,SRIA9,
SRIA8,SRIA7,SRIA6,SRIA5,SRIA4,SRIA3,SRIA2,SRIA1,SRIA0,
SRIB17,SRIB16,SRIB15,SRIB14,SRIB13,SRIB12,SRIB11,SRIB10,SRIB9,
SRIB8,SRIB7,SRIB6,SRIB5,SRIB4,SRIB3,SRIB2,SRIB1,SRIB0,
SIGNEDA,SIGNEDB,CE0,CE1,CE2,CE3,CLK0,CLK1,CLK2,CLK3,RST0,RST1,RST2,RST3,SOURCEA,SOURCEB)/*synthesis syn_black_box syn_noprune=1*/;
input A17,A16,A15,A14,A13,A12,A11,A10,A9,A8,A7,A6,A5,A4,A3,A2,A1,A0;
input B17,B16,B15,B14,B13,B12,B11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0;
input SIGNEDA,SIGNEDB,SOURCEA,SOURCEB;
input CE0,CE1,CE2,CE3,CLK0,CLK1,CLK2,CLK3,RST0,RST1,RST2,RST3;
input SRIA17,SRIA16,SRIA15,SRIA14,SRIA13,SRIA12,SRIA11,SRIA10,SRIA9;
input SRIA8,SRIA7,SRIA6,SRIA5,SRIA4,SRIA3,SRIA2,SRIA1,SRIA0;
input SRIB17,SRIB16,SRIB15,SRIB14,SRIB13,SRIB12,SRIB11,SRIB10,SRIB9;
input SRIB8,SRIB7,SRIB6,SRIB5,SRIB4,SRIB3,SRIB2,SRIB1,SRIB0;
output SROA17,SROA16,SROA15,SROA14,SROA13,SROA12,SROA11,SROA10,SROA9;
output SROA8,SROA7,SROA6,SROA5,SROA4,SROA3,SROA2,SROA1,SROA0;
output SROB17,SROB16,SROB15,SROB14,SROB13,SROB12,SROB11,SROB10,SROB9;
output SROB8,SROB7,SROB6,SROB5,SROB4,SROB3,SROB2,SROB1,SROB0;
//output ROA17,ROA16,ROA15,ROA14,ROA13,ROA12,ROA11,ROA10,ROA9;
//output ROA8,ROA7,ROA6,ROA5,ROA4,ROA3,ROA2,ROA1,ROA0;
//output ROB17,ROB16,ROB15,ROB14,ROB13,ROB12,ROB11,ROB10,ROB9;
//output ROB8,ROB7,ROB6,ROB5,ROB4,ROB3,ROB2,ROB1,ROB0;
output P35,P34,P33,P32,P31,P30,P29,P28,P27,P26,P25,P24,P23,P22,P21,P20,P19,P18;
output P17,P16,P15,P14,P13,P12,P11,P10,P9,P8,P7,P6,P5,P4,P3,P2,P1,P0;
//output SIGNEDP;
parameter REG_INPUTA_CLK = "NONE";
parameter REG_INPUTA_CE = "CE0";
parameter REG_INPUTA_RST = "RST0";
parameter REG_INPUTB_CLK = "NONE";
parameter REG_INPUTB_CE = "CE0";
parameter REG_INPUTB_RST = "RST0";
//parameter REG_PIPELINE_CLK = "NONE";
//parameter REG_PIPELINE_CE = "CE0";
//parameter REG_PIPELINE_RST = "RST0";
parameter REG_OUTPUT_CLK = "NONE";
parameter REG_OUTPUT_CE = "CE0";
parameter REG_OUTPUT_RST = "RST0";
parameter GSR = "ENABLED";
parameter CAS_MATCH_REG = "FALSE";
parameter MULT_BYPASS = "DISABLED";
parameter RESETMODE = "SYNC";
endmodule

(* black_box, dont_touch="true" *)
module xsALU54(
CE3,CE2,CE1,CE0,CLK3,CLK2,CLK1,CLK0,RST3,RST2,RST1,RST0,SIGNEDIA,SIGNEDIB,
A35,A34,A33,A32,A31,A30,A29,A28,A27,A26,A25,A24,A23,A22,A21,A20,A19,A18,
A17,A16,A15,A14,A13,A12,A11,A10,A9,A8,A7,A6,A5,A4,A3,A2,A1,A0,
B35,B34,B33,B32,B31,B30,B29,B28,B27,B26,B25,B24,B23,B22,B21,B20,B19,B18,
B17,B16,B15,B14,B13,B12,B11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0,
C53,C52,C51,C50,C49,C48,C47,C46,C45,C44,C43,C42,C41,C40,C39,C38,C37,C36,
C35,C34,C33,C32,C31,C30,C29,C28,C27,C26,C25,C24,C23,C22,C21,C20,C19,C18,
C17,C16,C15,C14,C13,C12,C11,C10,C9,C8,C7,C6,C5,C4,C3,C2,C1,C0,
MA35,MA34,MA33,MA32,MA31,MA30,MA29,MA28,MA27,MA26,MA25,MA24,MA23,MA22,MA21,
MA20,MA19,MA18,MA17,MA16,MA15,MA14,MA13,MA12,MA11,MA10,MA9,MA8,MA7,MA6,MA5,
MA4,MA3,MA2,MA1,MA0,
MB35,MB34,MB33,MB32,MB31,MB30,MB29,MB28,MB27,MB26,MB25,MB24,MB23,MB22,MB21,
MB20,MB19,MB18,MB17,MB16,MB15,MB14,MB13,MB12,MB11,MB10,MB9,MB8,MB7,MB6,MB5,
MB4,MB3,MB2,MB1,MB0,
CIN53,CIN52,CIN51,CIN50,CIN49,CIN48,CIN47,CIN46,CIN45,CIN44,CIN43,CIN42,
CIN41,CIN40,CIN39,CIN38,CIN37,CIN36,CIN35,CIN34,CIN33,CIN32,CIN31,CIN30,CIN29,
CIN28,CIN27,CIN26,CIN25,CIN24,CIN23,CIN22,CIN21,CIN20,CIN19,CIN18,CIN17,CIN16,
CIN15,CIN14,CIN13,CIN12,CIN11,CIN10,CIN9,CIN8,CIN7,CIN6,CIN5,CIN4,CIN3,CIN2,CIN1,CIN0,
OP10,OP9,OP8,OP7,OP6,OP5,OP4,OP3,OP2,OP1,OP0,SIGNEDCIN,
R53,R52,R51,R50,R49,R48,R47,R46,R45,R44,R43,R42,R41,R40,R39,R38,R37,R36,
R35,R34,R33,R32,R31,R30,R29,R28,R27,R26,R25,R24,R23,R22,R21,R20,R19,R18,
R17,R16,R15,R14,R13,R12,R11,R10,R9,R8,R7,R6,R5,R4,R3,R2,R1,R0,
EQZ,EQZM,EQOM,EQPAT,EQPATB,OVER,UNDER,OVERUNDER,SIGNEDR)/*synthesis syn_black_box syn_noprune=1*/;
input CE0,CE1,CE2,CE3,CLK0,CLK1,CLK2,CLK3,RST0,RST1,RST2,RST3,SIGNEDIA,SIGNEDIB;
input A35,A34,A33,A32,A31,A30,A29,A28,A27,A26,A25,A24,A23,A22,A21,A20,A19,A18;
input A17,A16,A15,A14,A13,A12,A11,A10,A9,A8,A7,A6,A5,A4,A3,A2,A1,A0;
input B35,B34,B33,B32,B31,B30,B29,B28,B27,B26,B25,B24,B23,B22,B21,B20,B19,B18;
input B17,B16,B15,B14,B13,B12,B11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0;
input C53,C52,C51,C50,C49,C48,C47,C46,C45,C44,C43,C42,C41,C40,C39,C38,C37,C36;
input C35,C34,C33,C32,C31,C30,C29,C28,C27,C26,C25,C24,C23,C22,C21,C20,C19,C18;
input C17,C16,C15,C14,C13,C12,C11,C10,C9,C8,C7,C6,C5,C4,C3,C2,C1,C0;
input MA35,MA34,MA33,MA32,MA31,MA30,MA29,MA28,MA27,MA26,MA25,MA24,MA23,MA22,MA21;
input MA20,MA19,MA18,MA17,MA16,MA15,MA14,MA13,MA12,MA11,MA10,MA9,MA8,MA7,MA6,MA5;
input MA4,MA3,MA2,MA1,MA0;
input MB35,MB34,MB33,MB32,MB31,MB30,MB29,MB28,MB27,MB26,MB25,MB24,MB23,MB22,MB21;
input MB20,MB19,MB18,MB17,MB16,MB15,MB14,MB13,MB12,MB11,MB10,MB9,MB8,MB7,MB6,MB5;
input MB4,MB3,MB2,MB1,MB0;
input CIN53,CIN52,CIN51,CIN50,CIN49,CIN48,CIN47,CIN46,CIN45,CIN44,CIN43,CIN42;
input CIN41,CIN40,CIN39,CIN38,CIN37,CIN36,CIN35,CIN34,CIN33,CIN32,CIN31,CIN30,CIN29;
input CIN28,CIN27,CIN26,CIN25,CIN24,CIN23,CIN22,CIN21,CIN20,CIN19,CIN18,CIN17,CIN16;
input CIN15,CIN14,CIN13,CIN12,CIN11,CIN10,CIN9,CIN8,CIN7,CIN6,CIN5,CIN4,CIN3,CIN2,CIN1,CIN0;
input OP10,OP9,OP8,OP7,OP6,OP5,OP4,OP3,OP2,OP1,OP0,SIGNEDCIN;
output R53,R52,R51,R50,R49,R48,R47,R46,R45,R44,R43,R42,R41,R40,R39,R38,R37,R36;
output R35,R34,R33,R32,R31,R30,R29,R28,R27,R26,R25,R24,R23,R22,R21,R20,R19,R18;
output R17,R16,R15,R14,R13,R12,R11,R10,R9,R8,R7,R6,R5,R4,R3,R2,R1,R0;
output EQZ,EQZM,EQOM,EQPAT,EQPATB,OVER,UNDER,OVERUNDER,SIGNEDR;
parameter REG_INPUTC0_CLK = "NONE";
parameter REG_INPUTC0_CE = "CE0";
parameter REG_INPUTC0_RST = "RST0";
parameter REG_INPUTC1_CLK = "NONE";
parameter REG_INPUTC1_CE = "CE0";
parameter REG_INPUTC1_RST = "RST0";
parameter REG_OPCODEOP0_0_CLK = "NONE";
parameter REG_OPCODEOP0_0_CE  = "CE0";
parameter REG_OPCODEOP0_0_RST = "RST0";
parameter REG_OPCODEOP1_0_CLK = "NONE";
parameter REG_OPCODEOP0_1_CLK = "NONE";
parameter REG_OPCODEOP0_1_CE = "CE0";
parameter REG_OPCODEOP0_1_RST = "RST0";
parameter REG_OPCODEOP1_1_CLK = "NONE";
parameter REG_OPCODEIN_0_CLK = "NONE";
parameter REG_OPCODEIN_0_CE = "CE0";
parameter REG_OPCODEIN_0_RST = "RST0";
parameter REG_OPCODEIN_1_CLK = "NONE";
parameter REG_OPCODEIN_1_CE = "CE0";
parameter REG_OPCODEIN_1_RST = "RST0";
parameter REG_OUTPUT0_CLK = "NONE";
parameter REG_OUTPUT0_CE = "CE0";
parameter REG_OUTPUT0_RST = "RST0";
parameter REG_OUTPUT1_CLK = "NONE";
parameter REG_OUTPUT1_CE = "CE0";
parameter REG_OUTPUT1_RST = "RST0";
parameter REG_FLAG_CLK = "NONE";
parameter REG_FLAG_CE = "CE0";
parameter REG_FLAG_RST = "RST0";
parameter MCPAT_SOURCE = "STATIC";
parameter MASKPAT_SOURCE = "STATIC";
parameter MASK01 = "0x00000000000000";
parameter MCPAT = "0x00000000000000";
parameter MASKPAT = "0x00000000000000";
parameter RNDPAT = "0x00000000000000";
parameter GSR = "ENABLED";
parameter RESETMODE = "SYNC";
parameter MULT9_MODE = "DISABLED";
parameter FORCE_ZERO_BARREL_SHIFT = "DISABLED";
parameter LEGACY = "DISABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsAND2 (A, B, Z)/*synthesis syn_black_box syn_noprune=1*/;
  input A ;
  input B ;
  output Z ;
endmodule

(* black_box, dont_touch="true" *)
module  xsAND3  (A, B, C, Z)/*synthesis syn_black_box syn_noprune=1*/;
  input A ;
  input B ;
  input C ;
  output Z ;
endmodule

(* black_box, dont_touch="true" *)
module  xsAND4  (A, B, C, D, Z)/*synthesis syn_black_box syn_noprune=1*/;
  input A ;
  input B ;
  input C ;
  input D ;
  output Z ;
endmodule

(* black_box, dont_touch="true" *)
module  xsAND5  (A, B, C, D, E, Z)/*synthesis syn_black_box syn_noprune=1*/;
  input A ;
  input B ;
  input C ;
  input D ;
  input E ;
  output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsNAND2 (A, B, Z)/*synthesis syn_black_box syn_noprune=1*/;
input  A ;
input  B ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module  xsNAND3  (A, B, C, Z)/*synthesis syn_black_box syn_noprune=1*/;
input  A ;
input  B ;
input  C ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module  xsNAND4  (A, B, C, D, Z)/*synthesis syn_black_box syn_noprune=1*/;
input  A ;
input  B ;
input  C ;
input  D ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module  xsNAND5  (A, B, C, D, E, Z)/*synthesis syn_black_box syn_noprune=1*/;
input  A ;
input  B ;
input  C ;
input  D ;
input  E ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsOR2 (A, B, Z)/*synthesis syn_black_box syn_noprune=1*/;
input  A ;
input  B ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsOR3 (A, B, C, Z)/*synthesis syn_black_box syn_noprune=1*/;
input  A ;
input  B ;
input  C ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsOR4 (A, B, C, D, Z)/*synthesis syn_black_box syn_noprune=1*/;
input  A ;
input  B ;
input  C ;
input  D ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsOR5 (A, B, C, D, E, Z)/*synthesis syn_black_box syn_noprune=1*/;
input  A ;
input  B ;
input  C ;
input  D ;
input  E ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsNOR2 (A, B, Z)/*synthesis syn_black_box syn_noprune=1*/;
input  A ;
input  B ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsNOR3 (A, B, C, Z)/*synthesis syn_black_box syn_noprune=1*/;
input  A ;
input  B ;
input  C ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsNOR4 (A, B, C, D, Z)/*synthesis syn_black_box syn_noprune=1*/;
input  A ;
input  B ;
input  C ;
input  D ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsNOR5 (A, B, C, D, E, Z)/*synthesis syn_black_box syn_noprune=1*/;
input  A ;
input  B ;
input  C ;
input  D ;
input  E ;
output Z ;
endmodule

(* black_box, dont_touch="true" *)
module xsXNOR2 (A, B, Z)/*synthesis syn_black_box syn_noprune=1*/;
  input  A ;
  input  B ;
  output Z;
endmodule

(* black_box, dont_touch="true" *)
module xsXNOR3 (A, B, C, Z)/*synthesis syn_black_box syn_noprune=1*/;
  input  A ;
  input  B ;
  input  C ;
  output Z;
endmodule

(* black_box, dont_touch="true" *)
module xsXNOR4 (A, B, C, D, Z)/*synthesis syn_black_box syn_noprune=1*/;
  input  A ;
  input  B ;
  input  C ;
  input  D ;
  output Z;
endmodule

(* black_box, dont_touch="true" *)
module xsXNOR5 (A, B, C, D, E, Z)/*synthesis syn_black_box syn_noprune=1*/;
  input  A ;
  input  B ;
  input  C ;
  input  D ;
  input  E ;
  output Z;
endmodule

(* black_box, dont_touch="true" *)
module xsXOR2 (A, B, Z)/*synthesis syn_black_box syn_noprune=1*/;
input A ;
input B ;
output Z;
endmodule

(* black_box, dont_touch="true" *)
module xsXOR3 (A, B, C, Z)/*synthesis syn_black_box syn_noprune=1*/;
input A ;
input B ;
input C ;
output Z;
endmodule

(* black_box, dont_touch="true" *)
module xsXOR4 (A, B, C, D, Z)/*synthesis syn_black_box syn_noprune=1*/;
input A ;
input B ;
input C ;
input D ;
output Z;
endmodule

(* black_box, dont_touch="true" *)
module xsXOR5 (A, B, C, D, E, Z)/*synthesis syn_black_box syn_noprune=1*/;
input A ;
input B ;
input C ;
input D ;
input E ;
output Z;
endmodule

(* black_box, dont_touch="true" *)
module xsCU2 (CI, PC1, PC0, CO, NC1, NC0)/*synthesis syn_black_box syn_noprune=1*/;
input  CI ;
input  PC1 ;
input  PC0 ;
output CO ;
output NC1 ;
output NC0 ;
endmodule

(* black_box, dont_touch="true" *)
module xsWAKEUP (WAKEUP)/*synthesis syn_black_box syn_noprune=1*/;
input WAKEUP ;
endmodule

(* black_box, dont_touch="true" *)
module xsMULT9 (
A8,A7,A6,A5,A4,A3,A2,A1,A0,B8,B7,B6,B5,B4,B3,B2,B1,B0,
SIGNEDA,SIGNEDB,SOURCEA,SOURCEB,
CE3,CE2,CE1,CE0,CLK3,CLK2,CLK1,CLK0,RST3,RST2,RST1,RST0,
SRIA8,SRIA7,SRIA6,SRIA5,SRIA4,SRIA3,SRIA2,SRIA1,SRIA0,
SRIB8,SRIB7,SRIB6,SRIB5,SRIB4,SRIB3,SRIB2,SRIB1,SRIB0,
SROA8,SROA7,SROA6,SROA5,SROA4,SROA3,SROA2,SROA1,SROA0,
SROB8,SROB7,SROB6,SROB5,SROB4,SROB3,SROB2,SROB1,SROB0,
ROA8,ROA7,ROA6,ROA5,ROA4,ROA3,ROA2,ROA1,ROA0,
ROB8,ROB7,ROB6,ROB5,ROB4,ROB3,ROB2,ROB1,ROB0,
P17,P16,P15,P14,P13,P12,P11,P10,P9,P8,P7,P6,P5,P4,P3,P2,P1,P0,
SIGNEDP)/*synthesis syn_black_box syn_noprune=1*/;
input A8,A7,A6,A5,A4,A3,A2,A1,A0;
input B8,B7,B6,B5,B4,B3,B2,B1,B0;
input SIGNEDA,SIGNEDB,SOURCEA,SOURCEB;
input CE0,CE1,CE2,CE3,CLK0,CLK1,CLK2,CLK3,RST0,RST1,RST2,RST3;
input SRIA8,SRIA7,SRIA6,SRIA5,SRIA4,SRIA3,SRIA2,SRIA1,SRIA0;
input SRIB8,SRIB7,SRIB6,SRIB5,SRIB4,SRIB3,SRIB2,SRIB1,SRIB0;
output SROA8,SROA7,SROA6,SROA5,SROA4,SROA3,SROA2,SROA1,SROA0;
output SROB8,SROB7,SROB6,SROB5,SROB4,SROB3,SROB2,SROB1,SROB0;
output ROA8,ROA7,ROA6,ROA5,ROA4,ROA3,ROA2,ROA1,ROA0;
output ROB8,ROB7,ROB6,ROB5,ROB4,ROB3,ROB2,ROB1,ROB0;
output P17,P16,P15,P14,P13,P12,P11,P10,P9,P8,P7,P6,P5,P4,P3,P2,P1,P0;
output SIGNEDP;
parameter REG_INPUTA_CLK = "NONE";
parameter REG_INPUTA_CE = "CE0";
parameter REG_INPUTA_RST = "RST0";
parameter REG_INPUTB_CLK = "NONE";
parameter REG_INPUTB_CE = "CE0";
parameter REG_INPUTB_RST = "RST0";
parameter REG_PIPELINE_CLK = "NONE";
parameter REG_PIPELINE_CE = "CE0";
parameter REG_PIPELINE_RST = "RST0";
parameter REG_OUTPUT_CLK = "NONE";
parameter REG_OUTPUT_CE = "CE0";
parameter REG_OUTPUT_RST = "RST0";
parameter CAS_MATCH_REG = "FALSE";
parameter MULT_BYPASS = "DISABLED";
parameter GSR = "ENABLED";
parameter RESETMODE = "SYNC";
endmodule

(* black_box, dont_touch="true" *)
module xsMULT9E (
A8,A7,A6,A5,A4,A3,A2,A1,A0,B8,B7,B6,B5,B4,B3,B2,B1,B0,
SIGNEDA,SIGNEDB,SOURCEA,SOURCEB,
CE3,CE2,CE1,CE0,CLK3,CLK2,CLK1,CLK0,RST3,RST2,RST1,RST0,
SRIA8,SRIA7,SRIA6,SRIA5,SRIA4,SRIA3,SRIA2,SRIA1,SRIA0,
SRIB8,SRIB7,SRIB6,SRIB5,SRIB4,SRIB3,SRIB2,SRIB1,SRIB0,
SROA8,SROA7,SROA6,SROA5,SROA4,SROA3,SROA2,SROA1,SROA0,
SROB8,SROB7,SROB6,SROB5,SROB4,SROB3,SROB2,SROB1,SROB0,
//ROA8,ROA7,ROA6,ROA5,ROA4,ROA3,ROA2,ROA1,ROA0,
//ROB8,ROB7,ROB6,ROB5,ROB4,ROB3,ROB2,ROB1,ROB0,
P17,P16,P15,P14,P13,P12,P11,P10,P9,P8,P7,P6,P5,P4,P3,P2,P1,P0)/*synthesis syn_black_box syn_noprune=1*/;
input A8,A7,A6,A5,A4,A3,A2,A1,A0;
input B8,B7,B6,B5,B4,B3,B2,B1,B0;
input SIGNEDA,SIGNEDB,SOURCEA,SOURCEB;
input CE0,CE1,CE2,CE3,CLK0,CLK1,CLK2,CLK3,RST0,RST1,RST2,RST3;
input SRIA8,SRIA7,SRIA6,SRIA5,SRIA4,SRIA3,SRIA2,SRIA1,SRIA0;
input SRIB8,SRIB7,SRIB6,SRIB5,SRIB4,SRIB3,SRIB2,SRIB1,SRIB0;
output SROA8,SROA7,SROA6,SROA5,SROA4,SROA3,SROA2,SROA1,SROA0;
output SROB8,SROB7,SROB6,SROB5,SROB4,SROB3,SROB2,SROB1,SROB0;
//output ROA8,ROA7,ROA6,ROA5,ROA4,ROA3,ROA2,ROA1,ROA0;
//output ROB8,ROB7,ROB6,ROB5,ROB4,ROB3,ROB2,ROB1,ROB0;
output P17,P16,P15,P14,P13,P12,P11,P10,P9,P8,P7,P6,P5,P4,P3,P2,P1,P0;
//output SIGNEDP;
parameter REG_INPUTA_CLK = "NONE";
parameter REG_INPUTA_CE = "CE0";
parameter REG_INPUTA_RST = "RST0";
parameter REG_INPUTB_CLK = "NONE";
parameter REG_INPUTB_CE = "CE0";
parameter REG_INPUTB_RST = "RST0";
//parameter REG_PIPELINE_CLK = "NONE";
//parameter REG_PIPELINE_CE = "CE0";
//parameter REG_PIPELINE_RST = "RST0";
parameter REG_OUTPUT_CLK = "NONE";
parameter REG_OUTPUT_CE = "CE0";
parameter REG_OUTPUT_RST = "RST0";
parameter CAS_MATCH_REG = "FALSE";
parameter MULT_BYPASS = "DISABLED";
parameter GSR = "ENABLED";
parameter RESETMODE = "SYNC";
endmodule

(* black_box, dont_touch="true" *)
module xsALU24(
MA17,MA16,MA15,MA14,MA13,MA12,MA11,MA10,MA9,MA8,MA7,MA6,MA5,
MA4,MA3,MA2,MA1,MA0,
MB17,MB16,MB15,MB14,MB13,MB12,MB11,MB10,MB9,MB8,MB7,MB6,MB5,
MB4,MB3,MB2,MB1,MB0,
CIN23,CIN22,CIN21,CIN20,CIN19,CIN18,CIN17,CIN16,
CIN15,CIN14,CIN13,CIN12,CIN11,CIN10,CIN9,CIN8,CIN7,CIN6,CIN5,CIN4,CIN3,CIN2,CIN1,CIN0,
CE3,CE2,CE1,CE0,CLK3,CLK2,CLK1,CLK0,RST3,RST2,RST1,RST0,SIGNEDIA,SIGNEDIB,OPADDNSUB,OPCINSEL,
R23,R22,R21,R20,R19,R18,
R17,R16,R15,R14,R13,R12,R11,R10,R9,R8,R7,R6,R5,R4,R3,R2,R1,R0)/*synthesis syn_black_box syn_noprune=1*/;
input MA17,MA16,MA15,MA14,MA13,MA12,MA11,MA10,MA9,MA8,MA7,MA6,MA5;
input MA4,MA3,MA2,MA1,MA0;
input MB17,MB16,MB15,MB14,MB13,MB12,MB11,MB10,MB9,MB8,MB7,MB6,MB5;
input MB4,MB3,MB2,MB1,MB0;
input CIN23,CIN22,CIN21,CIN20,CIN19,CIN18,CIN17,CIN16;
input CIN15,CIN14,CIN13,CIN12,CIN11,CIN10,CIN9,CIN8,CIN7,CIN6,CIN5,CIN4,CIN3,CIN2,CIN1,CIN0;
input CE0,CE1,CE2,CE3,CLK0,CLK1,CLK2,CLK3,RST0,RST1,RST2,RST3,SIGNEDIA,SIGNEDIB,OPADDNSUB,OPCINSEL;
output R23,R22,R21,R20,R19,R18;
output R17,R16,R15,R14,R13,R12,R11,R10,R9,R8,R7,R6,R5,R4,R3,R2,R1,R0;
parameter REG_OUTPUT_CLK = "NONE";
parameter REG_OUTPUT_CE = "CE0";
parameter REG_OUTPUT_RST = "RST0";
parameter REG_OPCODE_0_CLK = "NONE";
parameter REG_OPCODE_0_CE  = "CE0";
parameter REG_OPCODE_0_RST = "RST0";
parameter REG_OPCODE_1_CLK = "NONE";
parameter REG_OPCODE_1_CE = "CE0";
parameter REG_OPCODE_1_RST = "RST0";
parameter GSR = "ENABLED";
parameter RESETMODE = "SYNC";
endmodule

(* black_box, dont_touch="true" *)
module xsTEST(A7,A6,A5,A4,A3,A2,A1,A0,B7,B6,B5,B4,B3,B2,B1,B0,C7,C6,C5,C4,C3,C2,C1,C0,D7,D6,D5,D4,D3,D2,D1,D0,F7,F6,F5,F4,F3,F2,F1,F0,Q7,Q6,Q5,Q4,Q3,Q2,Q1,Q0,LSR0,LSR1,LSR2,LSR3,CE0,CE1,CE2,CE3,CLK0,CLK1,CLK2,CLK3,M0,M1,M2,M3,M4,M5,M6,M7)/*synthesis syn_black_box syn_noprune=1*/;
	parameter TF_TQ = "TF";
	parameter TESTCLK = "CLK0";
	parameter SEL_M = "M0";
    parameter SEL_F0 = "TF0";
    parameter SEL_F1 = "TF1";
    parameter SEL_F2 = "TF2";
    parameter SEL_F3 = "TF3";
    parameter SEL_F4 = "TF4";
    parameter SEL_F5 = "TF5";
    parameter SEL_F6 = "TF6";
    parameter SEL_F7 = "TF7";
    parameter SEL_Q0 = "TF_TQ0";
    parameter SEL_Q1 = "TF_TQ1";
    parameter SEL_Q2 = "TF_TQ2";
    parameter SEL_Q3 = "TF_TQ3";
    parameter SEL_Q4 = "TF_TQ4";
    parameter SEL_Q5 = "TF_TQ5";
    parameter SEL_Q6 = "TF_TQ6";
    parameter SEL_Q7 = "TF_TQ7";
	input CE0,CE1,CE2,CE3;
	input LSR0,LSR1,LSR2,LSR3;
	input CLK0,CLK1,CLK2,CLK3;
	input A7,A6,A5,A4,A3,A2,A1,A0;
	input B7,B6,B5,B4,B3,B2,B1,B0;
	input C7,C6,C5,C4,C3,C2,C1,C0;
	input D7,D6,D5,D4,D3,D2,D1,D0;
	input M0,M1,M2,M3,M4,M5,M6,M7;
	output F7,F6,F5,F4,F3,F2,F1,F0;
	output Q7,Q6,Q5,Q4,Q3,Q2,Q1,Q0;
endmodule

(* black_box, dont_touch="true" *)
module xsTEST_E1(
   input  LSR0, LSR1, LSR2, LSR3,
   input  CLK0, CLK1, CLK2, CLK3,
   input  M0, M1, M2, M3, M4, M5, M6, M7,
   output  Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7,
   output  F0, F1, F2, F3, F4, F5, F6, F7
)/*synthesis syn_black_box syn_noprune=1*/;
parameter SEL_F0 = "TF0"; //"TFn" "Fn"
parameter SEL_F1 = "TF1"; //mc1_testf<7:0>
parameter SEL_F2 = "TF2"; //=1 for "TFn", =0 for "Fn"
parameter SEL_F3 = "TF3";
parameter SEL_F4 = "TF4";
parameter SEL_F5 = "TF5";
parameter SEL_F6 = "TF6";
parameter SEL_F7 = "TF7";
parameter SEL_Q0 = "TF_TQ0"; //"TF_TQn" "Qn"
parameter SEL_Q1 = "TF_TQ1"; //mc1_testq<7:0>
parameter SEL_Q2 = "TF_TQ2"; //=1 for "TF_TQn", =0 for "Qn"
parameter SEL_Q3 = "TF_TQ3"; 
parameter SEL_Q4 = "TF_TQ4";
parameter SEL_Q5 = "TF_TQ5";
parameter SEL_Q6 = "TF_TQ6";
parameter SEL_Q7 = "TF_TQ7";
endmodule

(* black_box, dont_touch="true" *)
module xsFL(
    A0, A1, A2, A3, A4, A5, A6, A7, A8, A9, A10, A11, A12, A13,
    ARRDN0, ARRDN1, CEB, CHIP, CLOCK, CONFEN,
    ERASE, LCK_CFG, NVR_CFG, NVR, PORB, PROG2, PROG, RDEN, RECALL, TMEN, WEB,
    RETRY0, RETRY1, VREADY0, VREADY1,

    DIN0, DIN1, DIN2, DIN3, DIN4, DIN5, DIN6, DIN7, DIN8, DIN9,
    DIN10, DIN11, DIN12, DIN13, DIN14, DIN15, DIN16, DIN17, DIN18, DIN19,
    DIN20, DIN21, DIN22, DIN23, DIN24, DIN25, DIN26, DIN27, DIN28, DIN29,
    DIN30, DIN31, DIN32, DIN33, DIN34, DIN35, DIN36, DIN37, DIN38, DIN39,
    DIN40, DIN41, DIN42, DIN43, DIN44, DIN45, DIN46, DIN47, DIN48, DIN49,
    DIN50, DIN51, DIN52, DIN53, DIN54, DIN55, DIN56, DIN57, DIN58, DIN59,
    DIN60, DIN61, DIN62, DIN63, DIN64, DIN65, DIN66, DIN67, DIN68, DIN69,
    DIN70, DIN71, DIN72, DIN73, DIN74, DIN75, DIN76, DIN77, DIN78, DIN79,
    DIN80, DIN81, DIN82, DIN83, DIN84, DIN85, DIN86, DIN87, DIN88, DIN89,
    DIN90, DIN91, DIN92, DIN93, DIN94, DIN95, DIN96, DIN97, DIN98, DIN99,
    DIN100, DIN101, DIN102, DIN103, DIN104, DIN105, DIN106, DIN107, DIN108, DIN109,
    DIN110, DIN111, DIN112, DIN113, DIN114, DIN115, DIN116, DIN117, DIN118, DIN119,
    DIN120, DIN121, DIN122, DIN123, DIN124, DIN125, DIN126, DIN127,

    DOUT0, DOUT1, DOUT2, DOUT3, DOUT4, DOUT5, DOUT6, DOUT7, DOUT8, DOUT9,
    DOUT10, DOUT11, DOUT12, DOUT13, DOUT14, DOUT15, DOUT16, DOUT17, DOUT18, DOUT19,
    DOUT20, DOUT21, DOUT22, DOUT23, DOUT24, DOUT25, DOUT26, DOUT27, DOUT28, DOUT29,
    DOUT30, DOUT31, DOUT32, DOUT33, DOUT34, DOUT35, DOUT36, DOUT37, DOUT38, DOUT39,
    DOUT40, DOUT41, DOUT42, DOUT43, DOUT44, DOUT45, DOUT46, DOUT47, DOUT48, DOUT49,
    DOUT50, DOUT51, DOUT52, DOUT53, DOUT54, DOUT55, DOUT56, DOUT57, DOUT58, DOUT59,
    DOUT60, DOUT61, DOUT62, DOUT63, DOUT64, DOUT65, DOUT66, DOUT67, DOUT68, DOUT69,
    DOUT70, DOUT71, DOUT72, DOUT73, DOUT74, DOUT75, DOUT76, DOUT77, DOUT78, DOUT79,
    DOUT80, DOUT81, DOUT82, DOUT83, DOUT84, DOUT85, DOUT86, DOUT87, DOUT88, DOUT89,
    DOUT90, DOUT91, DOUT92, DOUT93, DOUT94, DOUT95, DOUT96, DOUT97, DOUT98, DOUT99,
    DOUT100, DOUT101, DOUT102, DOUT103, DOUT104, DOUT105, DOUT106, DOUT107, DOUT108, DOUT109,
    DOUT110, DOUT111, DOUT112, DOUT113, DOUT114, DOUT115, DOUT116, DOUT117, DOUT118, DOUT119,
    DOUT120, DOUT121, DOUT122, DOUT123, DOUT124, DOUT125, DOUT126, DOUT127)/*synthesis syn_black_box syn_noprune=1*/;
input    A0, A1, A2, A3, A4, A5, A6, A7, A8, A9, A10, A11, A12, A13;
input    ARRDN0, ARRDN1, CEB, CHIP, CLOCK, CONFEN;
input    ERASE, LCK_CFG, NVR_CFG, NVR, PORB, PROG2, PROG, RDEN, RECALL, TMEN, WEB;
input    RETRY0, RETRY1, VREADY0, VREADY1;
input    DIN0, DIN1, DIN2, DIN3, DIN4, DIN5, DIN6, DIN7, DIN8, DIN9;
input    DIN10, DIN11, DIN12, DIN13, DIN14, DIN15, DIN16, DIN17, DIN18, DIN19;
input    DIN20, DIN21, DIN22, DIN23, DIN24, DIN25, DIN26, DIN27, DIN28, DIN29;
input    DIN30, DIN31, DIN32, DIN33, DIN34, DIN35, DIN36, DIN37, DIN38, DIN39;
input    DIN40, DIN41, DIN42, DIN43, DIN44, DIN45, DIN46, DIN47, DIN48, DIN49;
input    DIN50, DIN51, DIN52, DIN53, DIN54, DIN55, DIN56, DIN57, DIN58, DIN59;
input    DIN60, DIN61, DIN62, DIN63, DIN64, DIN65, DIN66, DIN67, DIN68, DIN69;
input    DIN70, DIN71, DIN72, DIN73, DIN74, DIN75, DIN76, DIN77, DIN78, DIN79;
input    DIN80, DIN81, DIN82, DIN83, DIN84, DIN85, DIN86, DIN87, DIN88, DIN89;
input    DIN90, DIN91, DIN92, DIN93, DIN94, DIN95, DIN96, DIN97, DIN98, DIN99;
input    DIN100, DIN101, DIN102, DIN103, DIN104, DIN105, DIN106, DIN107, DIN108, DIN109;
input    DIN110, DIN111, DIN112, DIN113, DIN114, DIN115, DIN116, DIN117, DIN118, DIN119;
input    DIN120, DIN121, DIN122, DIN123, DIN124, DIN125, DIN126, DIN127;
output   DOUT0, DOUT1, DOUT2, DOUT3, DOUT4, DOUT5, DOUT6, DOUT7, DOUT8, DOUT9;
output   DOUT10, DOUT11, DOUT12, DOUT13, DOUT14, DOUT15, DOUT16, DOUT17, DOUT18, DOUT19;
output   DOUT20, DOUT21, DOUT22, DOUT23, DOUT24, DOUT25, DOUT26, DOUT27, DOUT28, DOUT29;
output   DOUT30, DOUT31, DOUT32, DOUT33, DOUT34, DOUT35, DOUT36, DOUT37, DOUT38, DOUT39;
output   DOUT40, DOUT41, DOUT42, DOUT43, DOUT44, DOUT45, DOUT46, DOUT47, DOUT48, DOUT49;
output   DOUT50, DOUT51, DOUT52, DOUT53, DOUT54, DOUT55, DOUT56, DOUT57, DOUT58, DOUT59;
output   DOUT60, DOUT61, DOUT62, DOUT63, DOUT64, DOUT65, DOUT66, DOUT67, DOUT68, DOUT69;
output   DOUT70, DOUT71, DOUT72, DOUT73, DOUT74, DOUT75, DOUT76, DOUT77, DOUT78, DOUT79;
output   DOUT80, DOUT81, DOUT82, DOUT83, DOUT84, DOUT85, DOUT86, DOUT87, DOUT88, DOUT89;
output   DOUT90, DOUT91, DOUT92, DOUT93, DOUT94, DOUT95, DOUT96, DOUT97, DOUT98, DOUT99;
output   DOUT100, DOUT101, DOUT102, DOUT103, DOUT104, DOUT105, DOUT106, DOUT107, DOUT108, DOUT109;
output   DOUT110, DOUT111, DOUT112, DOUT113, DOUT114, DOUT115, DOUT116, DOUT117, DOUT118, DOUT119;
output   DOUT120, DOUT121, DOUT122, DOUT123, DOUT124, DOUT125, DOUT126, DOUT127;
parameter TEST_EN = "FALSE";
endmodule

(* black_box, dont_touch="true" *)
module xsFL_E1(
    A0, A1, A2, A3, A4, A5, A6, A7, A8, A9, A10, A11,
    ARRDN0, ARRDN1, ARRDN2, ARRDN3, CEB, CHIP, CLOCK, CONFEN,
    ERASE, LCK_CFG, NVR_CFG, NVR, PORB, PROG2, PROG, RDEN, RECALL, TMEN, WEB,
    VREADY1,

    DIN0, DIN1, DIN2, DIN3, DIN4, DIN5, DIN6, DIN7, DIN8, DIN9,
    DIN10, DIN11, DIN12, DIN13, DIN14, DIN15, DIN16, DIN17, DIN18, DIN19,
    DIN20, DIN21, DIN22, DIN23, DIN24, DIN25, DIN26, DIN27, DIN28, DIN29,
    DIN30, DIN31, DIN32, DIN33, DIN34, DIN35, DIN36, DIN37, DIN38, DIN39,
    DIN40, DIN41, DIN42, DIN43, DIN44, DIN45, DIN46, DIN47, DIN48, DIN49,
    DIN50, DIN51, DIN52, DIN53, DIN54, DIN55, DIN56, DIN57, DIN58, DIN59,
    DIN60, DIN61, DIN62, DIN63, DIN64, DIN65, DIN66, DIN67, DIN68, DIN69,
    DIN70, DIN71, DIN72, DIN73, DIN74, DIN75, DIN76, DIN77, DIN78, DIN79,
    DIN80, DIN81, DIN82, DIN83, DIN84, DIN85, DIN86, DIN87, DIN88, DIN89,
    DIN90, DIN91, DIN92, DIN93, DIN94, DIN95, DIN96, DIN97, DIN98, DIN99,
    DIN100, DIN101, DIN102, DIN103, DIN104, DIN105, DIN106, DIN107, DIN108, DIN109,
    DIN110, DIN111, DIN112, DIN113, DIN114, DIN115, DIN116, DIN117, DIN118, DIN119,
    DIN120, DIN121, DIN122, DIN123, DIN124, DIN125, DIN126, DIN127,

    DOUT0, DOUT1, DOUT2, DOUT3, DOUT4, DOUT5, DOUT6, DOUT7, DOUT8, DOUT9,
    DOUT10, DOUT11, DOUT12, DOUT13, DOUT14, DOUT15, DOUT16, DOUT17, DOUT18, DOUT19,
    DOUT20, DOUT21, DOUT22, DOUT23, DOUT24, DOUT25, DOUT26, DOUT27, DOUT28, DOUT29,
    DOUT30, DOUT31, DOUT32, DOUT33, DOUT34, DOUT35, DOUT36, DOUT37, DOUT38, DOUT39,
    DOUT40, DOUT41, DOUT42, DOUT43, DOUT44, DOUT45, DOUT46, DOUT47, DOUT48, DOUT49,
    DOUT50, DOUT51, DOUT52, DOUT53, DOUT54, DOUT55, DOUT56, DOUT57, DOUT58, DOUT59,
    DOUT60, DOUT61, DOUT62, DOUT63, DOUT64, DOUT65, DOUT66, DOUT67, DOUT68, DOUT69,
    DOUT70, DOUT71, DOUT72, DOUT73, DOUT74, DOUT75, DOUT76, DOUT77, DOUT78, DOUT79,
    DOUT80, DOUT81, DOUT82, DOUT83, DOUT84, DOUT85, DOUT86, DOUT87, DOUT88, DOUT89,
    DOUT90, DOUT91, DOUT92, DOUT93, DOUT94, DOUT95, DOUT96, DOUT97, DOUT98, DOUT99,
    DOUT100, DOUT101, DOUT102, DOUT103, DOUT104, DOUT105, DOUT106, DOUT107, DOUT108, DOUT109,
    DOUT110, DOUT111, DOUT112, DOUT113, DOUT114, DOUT115, DOUT116, DOUT117, DOUT118, DOUT119,
    DOUT120, DOUT121, DOUT122, DOUT123, DOUT124, DOUT125, DOUT126, DOUT127)/*synthesis syn_black_box syn_noprune=1*/;
input    A0, A1, A2, A3, A4, A5, A6, A7, A8, A9, A10, A11;
input    ARRDN0, ARRDN1, ARRDN2, ARRDN3, CEB, CHIP, CLOCK, CONFEN;
input    ERASE, LCK_CFG, NVR_CFG, NVR, PORB, PROG2, PROG, RDEN, RECALL, TMEN, WEB;
input    VREADY1;
input    DIN0, DIN1, DIN2, DIN3, DIN4, DIN5, DIN6, DIN7, DIN8, DIN9;
input    DIN10, DIN11, DIN12, DIN13, DIN14, DIN15, DIN16, DIN17, DIN18, DIN19;
input    DIN20, DIN21, DIN22, DIN23, DIN24, DIN25, DIN26, DIN27, DIN28, DIN29;
input    DIN30, DIN31, DIN32, DIN33, DIN34, DIN35, DIN36, DIN37, DIN38, DIN39;
input    DIN40, DIN41, DIN42, DIN43, DIN44, DIN45, DIN46, DIN47, DIN48, DIN49;
input    DIN50, DIN51, DIN52, DIN53, DIN54, DIN55, DIN56, DIN57, DIN58, DIN59;
input    DIN60, DIN61, DIN62, DIN63, DIN64, DIN65, DIN66, DIN67, DIN68, DIN69;
input    DIN70, DIN71, DIN72, DIN73, DIN74, DIN75, DIN76, DIN77, DIN78, DIN79;
input    DIN80, DIN81, DIN82, DIN83, DIN84, DIN85, DIN86, DIN87, DIN88, DIN89;
input    DIN90, DIN91, DIN92, DIN93, DIN94, DIN95, DIN96, DIN97, DIN98, DIN99;
input    DIN100, DIN101, DIN102, DIN103, DIN104, DIN105, DIN106, DIN107, DIN108, DIN109;
input    DIN110, DIN111, DIN112, DIN113, DIN114, DIN115, DIN116, DIN117, DIN118, DIN119;
input    DIN120, DIN121, DIN122, DIN123, DIN124, DIN125, DIN126, DIN127;
output   DOUT0, DOUT1, DOUT2, DOUT3, DOUT4, DOUT5, DOUT6, DOUT7, DOUT8, DOUT9;
output   DOUT10, DOUT11, DOUT12, DOUT13, DOUT14, DOUT15, DOUT16, DOUT17, DOUT18, DOUT19;
output   DOUT20, DOUT21, DOUT22, DOUT23, DOUT24, DOUT25, DOUT26, DOUT27, DOUT28, DOUT29;
output   DOUT30, DOUT31, DOUT32, DOUT33, DOUT34, DOUT35, DOUT36, DOUT37, DOUT38, DOUT39;
output   DOUT40, DOUT41, DOUT42, DOUT43, DOUT44, DOUT45, DOUT46, DOUT47, DOUT48, DOUT49;
output   DOUT50, DOUT51, DOUT52, DOUT53, DOUT54, DOUT55, DOUT56, DOUT57, DOUT58, DOUT59;
output   DOUT60, DOUT61, DOUT62, DOUT63, DOUT64, DOUT65, DOUT66, DOUT67, DOUT68, DOUT69;
output   DOUT70, DOUT71, DOUT72, DOUT73, DOUT74, DOUT75, DOUT76, DOUT77, DOUT78, DOUT79;
output   DOUT80, DOUT81, DOUT82, DOUT83, DOUT84, DOUT85, DOUT86, DOUT87, DOUT88, DOUT89;
output   DOUT90, DOUT91, DOUT92, DOUT93, DOUT94, DOUT95, DOUT96, DOUT97, DOUT98, DOUT99;
output   DOUT100, DOUT101, DOUT102, DOUT103, DOUT104, DOUT105, DOUT106, DOUT107, DOUT108, DOUT109;
output   DOUT110, DOUT111, DOUT112, DOUT113, DOUT114, DOUT115, DOUT116, DOUT117, DOUT118, DOUT119;
output   DOUT120, DOUT121, DOUT122, DOUT123, DOUT124, DOUT125, DOUT126, DOUT127;
parameter TEST_EN = "FALSE";
endmodule

(* black_box, dont_touch="true" *)
module xsFL_E2(
    A0, A1, A2, A3, A4, A5, A6, A7, A8, A9, A10, A11, A12, A13,
    ARRDN0, ARRDN1, CEB, CHIP, CLOCK, CONFEN,
    ERASE, LCK_CFG, NVR_CFG, NVR, PORB, PROG2, PROG, RDEN, RECALL, TMEN, WEB,
    VREADY1, PREPG,

    DIN0, DIN1, DIN2, DIN3, DIN4, DIN5, DIN6, DIN7, DIN8, DIN9,
    DIN10, DIN11, DIN12, DIN13, DIN14, DIN15, DIN16, DIN17, DIN18, DIN19,
    DIN20, DIN21, DIN22, DIN23, DIN24, DIN25, DIN26, DIN27, DIN28, DIN29,
    DIN30, DIN31, DIN32, DIN33, DIN34, DIN35, DIN36, DIN37, DIN38, DIN39,
    DIN40, DIN41, DIN42, DIN43, DIN44, DIN45, DIN46, DIN47, DIN48, DIN49,
    DIN50, DIN51, DIN52, DIN53, DIN54, DIN55, DIN56, DIN57, DIN58, DIN59,
    DIN60, DIN61, DIN62, DIN63, DIN64, DIN65, DIN66, DIN67, DIN68, DIN69,
    DIN70, DIN71, DIN72, DIN73, DIN74, DIN75, DIN76, DIN77, DIN78, DIN79,
    DIN80, DIN81, DIN82, DIN83, DIN84, DIN85, DIN86, DIN87, DIN88, DIN89,
    DIN90, DIN91, DIN92, DIN93, DIN94, DIN95, DIN96, DIN97, DIN98, DIN99,
    DIN100, DIN101, DIN102, DIN103, DIN104, DIN105, DIN106, DIN107, DIN108, DIN109,
    DIN110, DIN111, DIN112, DIN113, DIN114, DIN115, DIN116, DIN117, DIN118, DIN119,
    DIN120, DIN121, DIN122, DIN123, DIN124, DIN125, DIN126, DIN127,

    DOUT0, DOUT1, DOUT2, DOUT3, DOUT4, DOUT5, DOUT6, DOUT7, DOUT8, DOUT9,
    DOUT10, DOUT11, DOUT12, DOUT13, DOUT14, DOUT15, DOUT16, DOUT17, DOUT18, DOUT19,
    DOUT20, DOUT21, DOUT22, DOUT23, DOUT24, DOUT25, DOUT26, DOUT27, DOUT28, DOUT29,
    DOUT30, DOUT31, DOUT32, DOUT33, DOUT34, DOUT35, DOUT36, DOUT37, DOUT38, DOUT39,
    DOUT40, DOUT41, DOUT42, DOUT43, DOUT44, DOUT45, DOUT46, DOUT47, DOUT48, DOUT49,
    DOUT50, DOUT51, DOUT52, DOUT53, DOUT54, DOUT55, DOUT56, DOUT57, DOUT58, DOUT59,
    DOUT60, DOUT61, DOUT62, DOUT63, DOUT64, DOUT65, DOUT66, DOUT67, DOUT68, DOUT69,
    DOUT70, DOUT71, DOUT72, DOUT73, DOUT74, DOUT75, DOUT76, DOUT77, DOUT78, DOUT79,
    DOUT80, DOUT81, DOUT82, DOUT83, DOUT84, DOUT85, DOUT86, DOUT87, DOUT88, DOUT89,
    DOUT90, DOUT91, DOUT92, DOUT93, DOUT94, DOUT95, DOUT96, DOUT97, DOUT98, DOUT99,
    DOUT100, DOUT101, DOUT102, DOUT103, DOUT104, DOUT105, DOUT106, DOUT107, DOUT108, DOUT109,
    DOUT110, DOUT111, DOUT112, DOUT113, DOUT114, DOUT115, DOUT116, DOUT117, DOUT118, DOUT119,
    DOUT120, DOUT121, DOUT122, DOUT123, DOUT124, DOUT125, DOUT126, DOUT127)/*synthesis syn_black_box syn_noprune=1*/;
input    A0, A1, A2, A3, A4, A5, A6, A7, A8, A9, A10, A11, A12, A13;
input    ARRDN0, ARRDN1, CEB, CHIP, CLOCK, CONFEN;
input    ERASE, LCK_CFG, NVR_CFG, NVR, PORB, PROG2, PROG, RDEN, RECALL, TMEN, WEB;
input    VREADY1, PREPG;
input    DIN0, DIN1, DIN2, DIN3, DIN4, DIN5, DIN6, DIN7, DIN8, DIN9;
input    DIN10, DIN11, DIN12, DIN13, DIN14, DIN15, DIN16, DIN17, DIN18, DIN19;
input    DIN20, DIN21, DIN22, DIN23, DIN24, DIN25, DIN26, DIN27, DIN28, DIN29;
input    DIN30, DIN31, DIN32, DIN33, DIN34, DIN35, DIN36, DIN37, DIN38, DIN39;
input    DIN40, DIN41, DIN42, DIN43, DIN44, DIN45, DIN46, DIN47, DIN48, DIN49;
input    DIN50, DIN51, DIN52, DIN53, DIN54, DIN55, DIN56, DIN57, DIN58, DIN59;
input    DIN60, DIN61, DIN62, DIN63, DIN64, DIN65, DIN66, DIN67, DIN68, DIN69;
input    DIN70, DIN71, DIN72, DIN73, DIN74, DIN75, DIN76, DIN77, DIN78, DIN79;
input    DIN80, DIN81, DIN82, DIN83, DIN84, DIN85, DIN86, DIN87, DIN88, DIN89;
input    DIN90, DIN91, DIN92, DIN93, DIN94, DIN95, DIN96, DIN97, DIN98, DIN99;
input    DIN100, DIN101, DIN102, DIN103, DIN104, DIN105, DIN106, DIN107, DIN108, DIN109;
input    DIN110, DIN111, DIN112, DIN113, DIN114, DIN115, DIN116, DIN117, DIN118, DIN119;
input    DIN120, DIN121, DIN122, DIN123, DIN124, DIN125, DIN126, DIN127;
output   DOUT0, DOUT1, DOUT2, DOUT3, DOUT4, DOUT5, DOUT6, DOUT7, DOUT8, DOUT9;
output   DOUT10, DOUT11, DOUT12, DOUT13, DOUT14, DOUT15, DOUT16, DOUT17, DOUT18, DOUT19;
output   DOUT20, DOUT21, DOUT22, DOUT23, DOUT24, DOUT25, DOUT26, DOUT27, DOUT28, DOUT29;
output   DOUT30, DOUT31, DOUT32, DOUT33, DOUT34, DOUT35, DOUT36, DOUT37, DOUT38, DOUT39;
output   DOUT40, DOUT41, DOUT42, DOUT43, DOUT44, DOUT45, DOUT46, DOUT47, DOUT48, DOUT49;
output   DOUT50, DOUT51, DOUT52, DOUT53, DOUT54, DOUT55, DOUT56, DOUT57, DOUT58, DOUT59;
output   DOUT60, DOUT61, DOUT62, DOUT63, DOUT64, DOUT65, DOUT66, DOUT67, DOUT68, DOUT69;
output   DOUT70, DOUT71, DOUT72, DOUT73, DOUT74, DOUT75, DOUT76, DOUT77, DOUT78, DOUT79;
output   DOUT80, DOUT81, DOUT82, DOUT83, DOUT84, DOUT85, DOUT86, DOUT87, DOUT88, DOUT89;
output   DOUT90, DOUT91, DOUT92, DOUT93, DOUT94, DOUT95, DOUT96, DOUT97, DOUT98, DOUT99;
output   DOUT100, DOUT101, DOUT102, DOUT103, DOUT104, DOUT105, DOUT106, DOUT107, DOUT108, DOUT109;
output   DOUT110, DOUT111, DOUT112, DOUT113, DOUT114, DOUT115, DOUT116, DOUT117, DOUT118, DOUT119;
output   DOUT120, DOUT121, DOUT122, DOUT123, DOUT124, DOUT125, DOUT126, DOUT127;
parameter TEST_EN = "FALSE";
endmodule

(* black_box, dont_touch="true" *)
module xsECC_MEM(
    A0, A1, A2, A3, A4, A5, A6, A7, A8, A9,
    CK, CSB, WEB,
    DI0, DI1, DI2, DI3, DI4, DI5, DI6, DI7, DI8, DI9,
    DI10, DI11, DI12, DI13, DI14, DI15,
    DO0, DO1, DO2, DO3, DO4, DO5, DO6, DO7, DO8, DO9,
    DO10, DO11, DO12, DO13, DO14, DO15)/*synthesis syn_black_box syn_noprune=1*/;
input    A0, A1, A2, A3, A4, A5, A6, A7, A8, A9;
input    CK, CSB, WEB;
input    DI0, DI1, DI2, DI3, DI4, DI5, DI6, DI7, DI8, DI9;
input    DI10, DI11, DI12, DI13, DI14, DI15;
output   DO0, DO1, DO2, DO3, DO4, DO5, DO6, DO7, DO8, DO9;
output   DO10, DO11, DO12, DO13, DO14, DO15;
parameter TEST_EN = "FALSE";
endmodule

(* black_box, dont_touch="true" *)
module xsADC_SL
(
    EXTVREF,
    IN,
    CHSL,
    CLKL,
    PDL,
    SAMPL,
    DOUTL,
    ENDL
)/*synthesis syn_black_box syn_noprune=1*/;
    //parameter ADC_REFS = "INTERNAL";   //1 for int
    parameter ADC_REFS = "EXTERNAL";   //0 for ext, from pt5d
    input  EXTVREF;
    input  [7:0] IN;
    input  [2:0] CHSL;
    input  CLKL;
    input  PDL;
    input  SAMPL;
    output [11:0] DOUTL;
    output ENDL;
endmodule

(* black_box, dont_touch="true" *)
module xsADC_E2
(
    EXTVREF,
    IN,
    CHSL,
    CLKL,
    PDL,
    SAMPL,
    DOUTL,
    ENDL
)/*synthesis syn_black_box syn_noprune=1*/;
    //parameter ADC_REFS = "INTERNAL";   //1 for int
    parameter ADC_REFS = "EXTERNAL";   //0 for ext, from pt5d
    input  EXTVREF;
    input  [15:0] IN;
    input  [3:0] CHSL;
    input  CLKL;
    input  PDL;
    input  SAMPL;
    output [11:0] DOUTL;
    output ENDL;
endmodule

(* black_box, dont_touch="true" *)
module xsDTR(
    TEMPCODE,
    DONE,
    STR,
    START,
    CLK
)/*synthesis syn_black_box syn_noprune=1*/;
    parameter DTR_EN = "DISABLED"; //1 for enabled, 0 for disabled
    input CLK;
    input START;
    input STR;
    output [6:0] TEMPCODE;
    output       DONE;
endmodule

(* black_box, dont_touch="true" *)
module xsECC_CEM
(
    DO,
    CLK,
    CS,
    WE,
    ADDR,
    DATA
)/*synthesis syn_black_box syn_noprune=1*/;
    input  [15:0] DO;
    output CLK;
    output CS;
    output WE;
    output [9:0] ADDR;
    output [15:0] DATA;
endmodule

(* black_box, dont_touch="true" *)
module xsECC_EFB
(
    DO,
    CLK,
    CS,
    WE,
    ADDR,
    DATA
)/*synthesis syn_black_box syn_noprune=1*/;
    input  [15:0] DO;
    output CLK;
    output CS;
    output WE;
    output [9:0] ADDR;
    output [15:0] DATA;
endmodule

(* black_box, dont_touch="true" *)
module xsECC_CEM_E1
(
    DO,
    CLK,
    CS,
    WE,
    ADDR,
    DATA
)/*synthesis syn_black_box syn_noprune=1*/;
    input  [15:0] DO;
    output CLK;
    output CS;
    output WE;
    output [10:0] ADDR;
    output [15:0] DATA;
endmodule

(* black_box, dont_touch="true" *)
module xsCRC32(
    DIN,
    RST,
    EN,
    CLK
)/*synthesis syn_black_box syn_noprune=1*/;
    input [31:0] DIN;
    input        RST;
    input        EN;
    input        CLK;
endmodule

(* black_box, dont_touch="true" *)
module xsPRBS31(
    DOUT,
    EN,
    RST,
    CLK
)/*synthesis syn_black_box syn_noprune=1*/;
    output [31:0] DOUT;
    input         RST;
    input         EN;
    input         CLK;
endmodule

(* black_box, dont_touch="true" *)
module xsTESTCNT(
    CLK,
    EN,
    RST,
    FLAG
)/*synthesis syn_black_box syn_noprune=1*/;
    input        CLK;
    input        RST;
    input        EN;
    output [9:0] FLAG;
    //new parameter
    parameter    MARK0 = 32'h0;
    parameter    MARK1 = 32'h0;
    parameter    MARK2 = 32'h0;
    parameter    MARK3 = 32'h0;
    parameter    MARK4 = 32'h0;
    parameter    MARK5 = 32'h0;
    parameter    MARK6 = 32'h0;
    parameter    MARK7 = 32'h0;
    parameter    MARK8 = 32'h0;
    parameter    MARK9 = 32'h0;
    parameter    FLAG_INV = 10'h0;
    parameter    CTRL_SRC_SEL = "PORT"; // "WB"
endmodule

(* black_box, dont_touch="true" *)
module xsSPRAM1KX32 (Q, ADR, D, WEM, WE, ME, CLK)/*synthesis syn_black_box syn_noprune=1*/;
output [31:0] Q;
input [9:0] ADR;
input [31:0] D;
input [3:0] WEM;
input WE;
input ME;
input CLK;
endmodule

(* black_box, dont_touch="true" *)
module xsDELAYDYN (
input A, LOADN, MOVE, DIRECTION,
output Z)/*synthesis syn_black_box syn_noprune=1*/;
parameter  DEL_MODE = "USER_DEFINED";
parameter  DEL_VALUE = 0; // 0-127
parameter  WAIT_FOR_EDGE = "DISABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsDELAYSA (
input  A,
output  Z )/*synthesis syn_black_box syn_noprune=1*/;
parameter  DEL_MODE = "USER_DEFINED";
parameter  DEL_VALUE = 0; // 0-127
endmodule

(* black_box, dont_touch="true" *)
module xsODELAY (
input  A,
output  Z )/*synthesis syn_black_box syn_noprune=1*/;
parameter  DEL_VALUE = 0; // 0-63
endmodule

(* black_box, dont_touch="true" *)
module xsIDDRSAX1( D, SCLK, RST, ALIGNWD, Q0, Q1)/*synthesis syn_black_box syn_noprune=1*/;
input  D, SCLK, RST, ALIGNWD;
output Q0, Q1;
   parameter  GSR = "ENABLED";            // "DISABLED", "ENABLED"
   parameter  SLIP_ENABLE = "FALSE";
endmodule

(* black_box, dont_touch="true" *)
module xsIDDRSAX2( D, ECLK, SCLK, RST, ALIGNWD, Q0, Q1, Q2, Q3)/*synthesis syn_black_box syn_noprune=1*/;
input  D, ECLK, SCLK, RST, ALIGNWD;
output Q0, Q1, Q2, Q3;
   parameter  GSR = "ENABLED";            // "DISABLED", "ENABLED"
   parameter  SLIP_ENABLE = "FALSE";
endmodule

(* black_box, dont_touch="true" *)
module xsIDDRSA71( D, ECLK, SCLK, RST, ALIGNWD, Q0, Q1, Q2, Q3, Q4, Q5, Q6)/*synthesis syn_black_box syn_noprune=1*/;
input  D, ECLK, SCLK, RST, ALIGNWD;
output Q0, Q1, Q2, Q3, Q4, Q5, Q6;
  parameter GSR = "ENABLED";
   parameter  SLIP_ENABLE = "FALSE";
endmodule

(* black_box, dont_touch="true" *)
module xsIDDRSAX4( D, ECLK, SCLK, RST, ALIGNWD, Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7)/*synthesis syn_black_box syn_noprune=1*/;
input  D, ECLK, SCLK, RST, ALIGNWD;
output Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7;
   parameter  GSR = "ENABLED";            // "DISABLED", "ENABLED"
   parameter  SLIP_ENABLE = "FALSE";
endmodule

(* black_box, dont_touch="true" *)
module xsDDRMDQIN( D, DQSR90, SCLK, RST, ALIGNWD, Q0, Q1)/*synthesis syn_black_box syn_noprune=1*/;
input  D, DQSR90, SCLK, RST, ALIGNWD;
output Q0, Q1;
   parameter  GSR = "ENABLED";            // "DISABLED", "ENABLED"
   parameter  SLIP_ENABLE = "FALSE";
endmodule

(* black_box, dont_touch="true" *)
module xsDDR2MDQIN( D, DQSR90, ECLK, SCLK, RST, ALIGNWD, Q0, Q1, Q2, Q3)/*synthesis syn_black_box syn_noprune=1*/;
input  D, DQSR90, ECLK, SCLK, RST, ALIGNWD;
output Q0, Q1, Q2, Q3;
   parameter  GSR = "ENABLED";            // "DISABLED", "ENABLED"
   parameter  SLIP_ENABLE = "FALSE";
endmodule

(* black_box, dont_touch="true" *)
module xsDDR3MDQIN( D, DQSR90, ECLK, SCLK, RST, ALIGNWD, Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7)/*synthesis syn_black_box syn_noprune=1*/;
input  D, DQSR90, ECLK, SCLK, RST, ALIGNWD;
output Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7;
   parameter  GSR = "ENABLED";            // "DISABLED", "ENABLED"
   parameter  SLIP_ENABLE = "FALSE";
endmodule

(* black_box, dont_touch="true" *)
module xsODDRSA(D0, D1, RST, SCLK, Q)/*synthesis syn_black_box syn_noprune=1*/;
   input D0, D1, RST, SCLK;
   output Q;
  parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsODDRSAX2(D0, D1, D2, D3, RST, ECLK, SCLK, Q)/*synthesis syn_black_box syn_noprune=1*/;
   input D0, D1, D2, D3, RST, ECLK, SCLK;
   output Q;
  parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsODDRSA71(D0, D1, D2, D3, D4, D5, D6, RST, ECLK, SCLK, Q)/*synthesis syn_black_box syn_noprune=1*/;
   input D0, D1, D2, D3, D4, D5, D6, RST, ECLK, SCLK;
   output Q;
  parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsODDRSAX4(D0, D1, D2, D3, D4, D5, D6, D7, RST, ECLK, SCLK, Q)/*synthesis syn_black_box syn_noprune=1*/;
   input D0, D1, D2, D3, D4, D5, D6, D7, RST, ECLK, SCLK;
   output Q;
  parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsDDRMDQOUT(D0, D1, RST, SCLK, DQSW270, Q)/*synthesis syn_black_box syn_noprune=1*/;
   input D0, D1, RST, SCLK, DQSW270;
   output Q;
  parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsDDRMDQSOUT(D0, D1, RST, SCLK, DQSW, Q)/*synthesis syn_black_box syn_noprune=1*/;
   input D0, D1, RST, SCLK, DQSW;
   output Q;
  parameter GSR = "ENABLED";
endmodule

(* black_box, dont_touch="true" *)
module xsDDR2MDQOUT(D0, D1, D2, D3, RST, ECLK, SCLK, DQSW270, Q)/*synthesis syn_black_box syn_noprune=1*/;
   input D0, D1, D2, D3, RST, ECLK, SCLK, DQSW270;
   output Q;
  parameter GSR = "ENABLED";
  parameter  WL_ENABLE = "FALSE";
  parameter WRITE_LEVELING = "2T";
endmodule

(* black_box, dont_touch="true" *)
module xsDDR2MDQSOUT(D0, D1, D2, D3, RST, ECLK, SCLK, DQSW, Q)/*synthesis syn_black_box syn_noprune=1*/;
   input D0, D1, D2, D3, RST, ECLK, SCLK, DQSW;
   output Q;
  parameter GSR = "ENABLED";
  parameter  WL_ENABLE = "FALSE";
  parameter WRITE_LEVELING = "2T";
endmodule

(* black_box, dont_touch="true" *)
module xsDDR3MDQOUT(D0, D1, D2, D3, D4, D5, D6, D7, RST, ECLK, SCLK, DQSW270, Q)/*synthesis syn_black_box syn_noprune=1*/;
   input D0, D1, D2, D3, D4, D5, D6, D7, RST, ECLK, SCLK, DQSW270;
   output Q;
  parameter GSR = "ENABLED";
  parameter WRITE_LEVELING = "2T";
endmodule

(* black_box, dont_touch="true" *)
module xsDDR3MDQSOUT(D0, D1, D2, D3, D4, D5, D6, D7, RST, ECLK, SCLK, DQSW, Q)/*synthesis syn_black_box syn_noprune=1*/;
   input D0, D1, D2, D3, D4, D5, D6, D7, RST, ECLK, SCLK, DQSW;
   output Q;
  parameter GSR = "ENABLED";
  parameter WRITE_LEVELING = "2T";
endmodule

(* black_box, dont_touch="true" *)
module xsDDR2MADDRCMD(D0, D1, RST, ECLK, SCLK, DQSW270, Q)/*synthesis syn_black_box syn_noprune=1*/;
   input D0, D1, RST, ECLK, SCLK, DQSW270;
   output Q;
  parameter GSR = "ENABLED";
  parameter  WL_ENABLE = "FALSE";
  parameter WRITE_LEVELING = "2T";
endmodule

(* black_box, dont_touch="true" *)
module xsDDR3MADDRCMD(D0, D1, D2, D3, RST, ECLK, SCLK, DQSW270, Q)/*synthesis syn_black_box syn_noprune=1*/;
   input D0, D1, D2, D3, RST, ECLK, SCLK, DQSW270;
   output Q;
  parameter GSR = "ENABLED";
  parameter WRITE_LEVELING = "2T";
endmodule

(* black_box, dont_touch="true" *)
module xsDDRMDQTRIOUT(T0, SCLK, ECLK, DQSW270, RST, Q)/*synthesis syn_black_box syn_noprune=1*/;
input  T0, SCLK, ECLK, DQSW270, RST;
output Q;
   parameter  GSR = "ENABLED";            // "DISABLED", "ENABLED"
   parameter  REGSET = "SET";             // "SET", "RESET"
endmodule

(* black_box, dont_touch="true" *)
module xsDDRMDQSTRIOUT(T0, SCLK, ECLK, DQSW, RST, Q)/*synthesis syn_black_box syn_noprune=1*/;
input  T0, SCLK, ECLK, DQSW, RST;
output Q;
   parameter  GSR = "ENABLED";            // "DISABLED", "ENABLED"
   parameter  REGSET = "SET";             // "SET", "RESET"
endmodule

(* black_box, dont_touch="true" *)
module xsDDR2MDQTRIOUT(T0, T1, SCLK, ECLK, DQSW270, RST, Q)/*synthesis syn_black_box syn_noprune=1*/;
input  T0, T1, SCLK, ECLK, DQSW270, RST;
output Q;
   parameter  GSR = "ENABLED";            // "DISABLED", "ENABLED"
   parameter  REGSET = "SET";             // "SET", "RESET"
   parameter  WL_ENABLE = "FALSE";
  parameter WRITE_LEVELING = "2T";
endmodule

(* black_box, dont_touch="true" *)
module xsDDR2MDQSTRIOUT(T0, T1, SCLK, ECLK, DQSW, RST, Q)/*synthesis syn_black_box syn_noprune=1*/;
input  T0, T1, SCLK, ECLK, DQSW, RST;
output Q;
   parameter  GSR = "ENABLED";            // "DISABLED", "ENABLED"
   parameter  REGSET = "SET";             // "SET", "RESET"
   parameter  WL_ENABLE = "FALSE";
  parameter WRITE_LEVELING = "2T";
endmodule

(* black_box, dont_touch="true" *)
module xsDDR3MDQTRIOUT(T0, T1, T2, T3, SCLK, ECLK, DQSW270, RST, Q)/*synthesis syn_black_box syn_noprune=1*/;
input  T0, T1, T2, T3, SCLK, ECLK, DQSW270, RST;
output Q;
   parameter  GSR = "ENABLED";            // "DISABLED", "ENABLED"
   parameter  REGSET = "SET";             // "SET", "RESET"
  parameter WRITE_LEVELING = "2T";
endmodule

(* black_box, dont_touch="true" *)
module xsDDR3MDQSTRIOUT(T0, T1, T2, T3, SCLK, ECLK, DQSW, RST, Q)/*synthesis syn_black_box syn_noprune=1*/;
input  T0, T1, T2, T3, SCLK, ECLK, DQSW, RST;
output Q;
   parameter  GSR = "ENABLED";            // "DISABLED", "ENABLED"
   parameter  REGSET = "SET";             // "SET", "RESET"
  parameter WRITE_LEVELING = "2T";
endmodule

(* black_box, dont_touch="true" *)
module xsDQSBUFR(DQSI, READ3, READ2, READ1, READ0, READCLKSEL2, READCLKSEL1, READCLKSEL0, DDRDEL,
//       DYNDELAY7, DYNDELAY6, DYNDELAY5, DYNDELAY4,
//       DYNDELAY3, DYNDELAY2, DYNDELAY1, DYNDELAY0,
       ECLK, SCLK,
       RST, PAUSE,
       DQSR90, DQSW, DQSW270, DATAVALID,
       BURSTDET)/*synthesis syn_black_box syn_noprune=1*/;
input  DQSI, READ3, READ2, READ1, READ0, READCLKSEL2, READCLKSEL1, READCLKSEL0, DDRDEL;
input  ECLK, SCLK;
input  RST, PAUSE;
output DQSR90, DQSW, DQSW270, DATAVALID;
output BURSTDET;
   parameter CONTINUE_READ = "FALSE";
  parameter  WL_ENABLE = "FALSE";
  parameter WRITE_LEVELING = "2T";
   parameter DQS_LI_DEL_ADJ = "FACTORYONLY";
   parameter DQS_LI_DEL_VAL = 0;
   parameter DQS_LO_DEL_ADJ = "FACTORYONLY";
   parameter DQS_LO_DEL_VAL = 0;
   parameter GSR = "ENABLED";
   parameter DDRXMODE = 0;
//   parameter GEARING_MODE = "X2";          // "X2", "X4"
   // these 2 parameter must be same as releated DDRDLL
   parameter CSCALE_EN = "FALSE";
   parameter CSCALE = 0;
   parameter DQSR90_INSEL = "DQSBUF"; // DQSTREE
   parameter DQSW270_INSEL = "DQSBUF"; // DQSTREE
   parameter DQSW_INSEL = "DQSBUF"; // DQSTREE
   parameter READ_ENA_DELAY = "0.0NS"; // 0.8NS
   //parameter CUSTOM_READ_ENA_DELAY = 0; // 8 bits
   //parameter USE_CUSTOM_READ_ENA_DELAY = "FALSE";
endmodule

(* black_box, dont_touch="true" *)
module xsDQSDLLD (
   input    CLK, RST, UDDCNTLN, FREEZE,
   output   SDOUT0, SDOUT1, SDOUT2, SDOUT3, SDOUT4, SDOUT5, SDOUT6, SDOUT7, DIVOSC,
   output   LOCK, DQSDEL )/*synthesis syn_black_box syn_noprune=1*/;
   parameter GSR = "ENABLED";
   parameter DEL_ADJ = "PLUS";
   parameter DEL_VAL = 0;
   parameter LOCK_SENSITIVITY = "LOW";
   parameter FIN = "100.0";
   parameter FORCE_MAX_DELAY = "NO";
endmodule

(* black_box, dont_touch="true" *)
module xsDLLDLYE (
   input    CLKI, DQSDEL,
   output   CLKO )/*synthesis syn_black_box syn_noprune=1*/;
   parameter DEL_ADJ  = "PLUS";
   parameter DEL_VAL = 0; // 8 bits instead of 7 bits
endmodule

(* black_box, dont_touch="true" *)
module xsDNA_PORT(input CLK, SHIFT, output DOUT)/*synthesis syn_black_box syn_noprune=1*/;
endmodule

(* black_box, dont_touch="true" *)
module xsADC_E1
(
    //EXTVREF,
    IN,
    CHSL,
    CLKL,
    PDL,
    SAMPL,
    DOUTL,
    ENDL
)/*synthesis syn_black_box syn_noprune=1*/;
    //parameter ADC_REFS = "INTERNAL";   //1 for int
    parameter ADC_REFS = "EXTERNAL";   //0 for ext, from dedicate pad
    //input  EXTVREF;
    input  [7:0] IN;
    input  [2:0] CHSL;
    input  CLKL;
    input  PDL;
    input  SAMPL;
    output [11:0] DOUTL;
    output ENDL;
endmodule
