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*   SCEW V1.0.0 SmartChip Embedded Workspace Beta Release Note
*
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* UPDATE HISTORY *

[09/17/2024]  V1.0.0 Beta091724
- GUI
  Support external editor
  Fix issues related with hierarchy refresh, report, project, ...etc.
- Bitgen
  Update related with DSP/Pre-adder, SED CRC
- Place & Route
  Improvement placement to better handle EBR/DSPs
- Design Interface
  update xsDLLDLY xsDELAYDYN simulation file
- STA
  Fix a bug related with set_false_path to a clock source pin

[08/22/2024]  V1.0.0 Beta082224
- Downloader
  Fix CRC problem in bit2bin for Seal 126K/366K devices

[08/18/2024]  V1.0.0 Beta081824
- GUI
  Add support to add/remove file in design hierarchy tab page
  Add hierarchy refresh function
  Support project clean function
  Fix an issues related with EDIF top module change
- IP Creator
  Change IP Aurora_8b10b to 8b10b_Encoder_Decoder
  FIFO_Generator IP: fixe reset logic by adding auto-reset
  FIFO IP: fix an issue related with RDC enable condition

[08/12/2024]  V1.0.0 Beta081224
- GUI
  Fix a corner issue in design hierarchy display, related with conditional
     generate statement. This issue only affects visual effect, synthesis
     result is correct.

[08/09/2024]  V1.0.0 Beta080924
- Downloader
  Fix error in downloading bitstream.
- Design interface
  Fix in-complete content issue for certain simulation models.
  Remove DDRC simulation models : not applicable to SCM device
- IP Creator
  FIFO IP: Fix issues found during inner test.

[08/05/2024]  V1.0.0 Beta080524
- IP Creator
  EBR IP: Fix issues found by customers, under configurations:
    PDP_wr2048x32_rd8192x8
    PDP_wr512x256_rd512x256
- Downloader
  Fix EBR bit downloading and bit2svf issue

[07/31/2024]  V1.0.0 Beta073124
- IP Creator
  FIFO IP updates:
    Add 'Almost Full MAX Reference' for almost_full;
    Refined RDC port display of enable/disable status and range (if enabled);
  FIFO_Generator IP update related with rdata reset under fwft mode
- GUI
  Refine display of top module (NOT using red color)

[07/29/2024]  V1.0.0 Beta072924
- IP Creator
  Fix reconfigure IP issue when ip output file name prefix is not "xsIP"

[07/21/2024]  V1.0.0 Beta072124
- GUI
  Support relative source file path against project path.

[06/29/2024]  V1.0.0 Beta062924
- Downloader
  Add MSPI download support
  Add SVF file option on downloader GUI

[06/25/2024]  V1.0.0 Beta062524
- Place & Route
  Refine regional clock support
- Design Interface
  Enhance parameter value range checking for primitives.

[06/15/2024]  V1.0.0 Beta061524
- Adjust EBR resource report

[05/31/2024]  V1.0.0 Beta053124
- IP Creator
  Add EBR IPGEN support
- Place & Route
  Enhance clock support
  Fix SED cr0 setting
- RTL synthesis
  RAM inference enhancement related with SDP, ADDR-REG, ByteEnable
  Enhance array index net handling
  Fix a crash issue caused by NULL pointer
- Bitgen
  Fix issue for HSTL12D SSTL12D POD12D IO types
  Set ECC_EFB and ISCPU model as don't touch
  Support customized DCLK frequency
- Others
  Update user manual to v1.2

[05/18/2024]  V1.0.0 Beta051824
- Downloader
  Fix MSPI X8 mode issue
- Bitgen
  Fix ODT fuse issue
- Place & Route
  Refine clock network support

[04/24/2024]  V1.0.0 Beta042424
- UI/downloader
  Fix typos

[04/19/2024]  V1.0.0 Beta041924
- Device support update
  Fix issues in Packer/Placer/Router/Bitgen, related with:
  	SOC_INTERFACE, SED, EBR-INIT, BDCS, etc.

[02/28/2024]  V1.0.0 Beta022824
- Device update
  Change device name to SCM905-8F1297C (support of 1297-pin package)

[02/03/2024]  V1.0.0 Beta020324
- Routing
  Fix issues related with DCC handling
- Others
  Fix typo in user manual

[01/29/2024]  V1.0.0 Beta012924
SmartChip Embedded Workspace Beta release
- device update
  Change family name to "Haiyan"